diff options
| author | Richard Lin | 2016-05-20 16:34:03 -0700 |
|---|---|---|
| committer | Richard Lin | 2016-05-20 16:34:03 -0700 |
| commit | d742d70a05b5fa997517ea7b5eb2d15b23e7a431 (patch) | |
| tree | 3c2453014c78e889fd1502085661ed604c5f0b34 /chiselFrontend/src/main/scala/Chisel/Module.scala | |
| parent | d7697eb14a0195cc3726bf45fdf38c631b6f6507 (diff) | |
| parent | e92f2f69477a6ce86fc148a1a95db5797f2e3051 (diff) | |
Merge pull request #186 from ucb-bar/sloc_impl
Source locators
Diffstat (limited to 'chiselFrontend/src/main/scala/Chisel/Module.scala')
| -rw-r--r-- | chiselFrontend/src/main/scala/Chisel/Module.scala | 32 |
1 files changed, 21 insertions, 11 deletions
diff --git a/chiselFrontend/src/main/scala/Chisel/Module.scala b/chiselFrontend/src/main/scala/Chisel/Module.scala index 62e907b6..20c9dd4a 100644 --- a/chiselFrontend/src/main/scala/Chisel/Module.scala +++ b/chiselFrontend/src/main/scala/Chisel/Module.scala @@ -3,11 +3,13 @@ package Chisel import scala.collection.mutable.{ArrayBuffer, HashSet} +import scala.language.experimental.macros import internal._ import internal.Builder.pushCommand import internal.Builder.dynamicContext import internal.firrtl._ +import internal.sourceinfo.{SourceInfo, InstTransform, UnlocatableSourceInfo} object Module { /** A wrapper method that all Module instantiations must be wrapped in @@ -17,15 +19,21 @@ object Module { * * @return the input module `m` with Chisel metadata properly set */ - def apply[T <: Module](bc: => T): T = { + def apply[T <: Module](bc: => T): T = macro InstTransform.apply[T] + + def do_apply[T <: Module](bc: => T)(implicit sourceInfo: SourceInfo): T = { + // Don't generate source info referencing parents inside a module, sincce this interferes with + // module de-duplication in FIRRTL emission. + val childSourceInfo = UnlocatableSourceInfo + val parent = dynamicContext.currentModule val m = bc.setRefs() - m._commands.prepend(DefInvalid(m.io.ref)) // init module outputs + m._commands.prepend(DefInvalid(childSourceInfo, m.io.ref)) // init module outputs dynamicContext.currentModule = parent val ports = m.computePorts Builder.components += Component(m, m.name, ports, m._commands) - pushCommand(DefInstance(m, ports)) - m.setupInParent() + pushCommand(DefInstance(sourceInfo, m, ports)) + m.setupInParent(childSourceInfo) } } @@ -70,14 +78,16 @@ extends HasId { Port(port, if (port.dir == NO_DIR) bundleDir else port.dir) } - private[Chisel] def setupInParent(): this.type = _parent match { - case Some(p) => { - pushCommand(DefInvalid(io.ref)) // init instance inputs - clock := override_clock.getOrElse(p.clock) - reset := override_reset.getOrElse(p.reset) - this + private[Chisel] def setupInParent(implicit sourceInfo: SourceInfo): this.type = { + _parent match { + case Some(p) => { + pushCommand(DefInvalid(sourceInfo, io.ref)) // init instance inputs + clock := override_clock.getOrElse(p.clock) + reset := override_reset.getOrElse(p.reset) + this + } + case None => this } - case None => this } private[Chisel] def setRefs(): this.type = { |
