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authorDeborah Soung2021-06-14 15:34:45 -0700
committerGitHub2021-06-14 22:34:45 +0000
commitea84a17691c1fbea81644788b78699702c8faaf3 (patch)
treed4b89f3c4ce34d73728dfcf34e9c122c8c55594f /README.md
parent820200b75242dde2a66c8103fd53eb10afc7ff6b (diff)
explain sub-projects in README (#1962)
* explain sub-projects * Update README.md Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Megan Wachs <megan@sifive.com>
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@@ -243,6 +243,17 @@ Also included is:
- **Chisel Stage**, `chisel3.stage.*`, which contains compilation and test
functions that are invoked in the standard Verilog generation and simulation
testing infrastructure. These can also be used as part of custom flows.
+
+### Chisel Sub-Projects
+
+Chisel consists of 4 Scala projects; each is its own separate compilation unit:
+
+- [`core`](core) is the bulk of the source code of Chisel, depends on `macros`
+- [`src/main`](src/main) is the "main" that brings it all together and includes a [`util`](src/main/scala/chisel3/util) library, which depends on `core`
+- [`plugin`](plugin) is the compiler plugin, no internal dependencies
+- [`macros`](macros) is most of the macros used in Chisel, no internal dependencies
+
+Code that touches lots of APIs that are private to the `chisel3` package should belong in `core`, while code that is pure Chisel should belong in `src/main`.
### Which version should I use?