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| author | Jim Lawson | 2017-04-27 11:18:07 -0700 |
|---|---|---|
| committer | GitHub | 2017-04-27 11:18:07 -0700 |
| commit | 989fbd5de53606cac85a9e6944c1f255f4cf04c9 (patch) | |
| tree | 59335d4321c178e7a2b0e6bd7e6eb17086059b03 /README.md | |
| parent | 36718cf6040990f2be9ab143adb1d3c519e9d983 (diff) | |
Update instructions for installing firrtl. (#597)
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -21,7 +21,7 @@ This will walk you through installing Chisel and its dependencies: - [sbt](http://www.scala-sbt.org/), which is the preferred Scala build system and what Chisel uses. - [Firrtl](https://github.com/ucb-bar/firrtl), which compiles Chisel's IR down - to Verilog. Separate installation of Firrtl is no longer required. + to Verilog. If you're building from the release branch of chisel3, separate installation of Firrtl is no longer required: the required jar will be automatically downloaed by sbt. If you're building chisel3 from the master branch, you'll need to follow the directions on the [firrtl project](https://github.com/ucb-bar/firrtl) to publish a local copy of the required jar. - [Verilator](http://www.veripool.org/wiki/verilator), which compiles Verilog down to C++ for simulation. The included unit testing infrastructure uses this. |
