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authorJim Lawson2016-03-10 14:50:14 -0800
committerJim Lawson2016-03-10 14:50:14 -0800
commit3f2c82b9535562e157a1cc1f83b36bf8af932158 (patch)
tree7660bd9b05fd29c6f28ca35749e6b26f475db85a /README.md
parent60ee5a795538b06f8e054f939525ae797c2e9439 (diff)
Correct reference to Chisel3 compatibility mode.
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@@ -34,7 +34,7 @@ modifications are:
Notice the address register is now internal to the SeqMem(), but the data
will still return on the subsequent cycle.
- Please refer to [Chisel2 README](https://github.com/ucb-bar/chisel)
+ Please refer to the [Chisel3 compatibility section](https://github.com/ucb-bar/chisel#chisel3)
for instructions on preparing your Chisel2 designs for Chisel3.
## Overview