diff options
| author | Jack Koenig | 2017-12-14 15:04:50 -0800 |
|---|---|---|
| committer | GitHub | 2017-12-14 15:04:50 -0800 |
| commit | ef1400f45404210121f53b38585602a8c7c2560e (patch) | |
| tree | 22c989b6f42c9c206dd99d74e376dd95f81c4dd0 | |
| parent | c327dc328ca819031a086ae102fefe2909831e24 (diff) | |
Add error message for <> of Vec and Seq of different lengths (#739)
Fixes #482
| -rw-r--r-- | chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala | 4 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/Vec.scala | 22 |
2 files changed, 25 insertions, 1 deletions
diff --git a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala index a4eeb8a5..b89961aa 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Aggregate.scala @@ -176,7 +176,9 @@ sealed class Vec[T <: Data] private[core] (gen: => T, val length: Int) * @note the length of this Vec must match the length of the input Seq */ def <> (that: Seq[T])(implicit sourceInfo: SourceInfo, moduleCompileOptions: CompileOptions): Unit = { - require(this.length == that.length) + if (this.length != that.length) { + Builder.error("Vec and Seq being bulk connected have different lengths!") + } for ((a, b) <- this zip that) a <> b } diff --git a/src/test/scala/chiselTests/Vec.scala b/src/test/scala/chiselTests/Vec.scala index 1c5157b5..08b9cdf5 100644 --- a/src/test/scala/chiselTests/Vec.scala +++ b/src/test/scala/chiselTests/Vec.scala @@ -252,4 +252,26 @@ class VecSpec extends ChiselPropSpec { property("Dynamic indexing of a Vec of Module IOs should work") { assertTesterPasses{ new ModuleIODynamicIndexTester(4) } } + + property("It should be possible to bulk connect a Vec and a Seq") { + elaborate(new Module { + val io = IO(new Bundle { + val out = Output(Vec(4, UInt(8.W))) + }) + val seq = Seq.fill(4)(0.U) + io.out <> seq + }) + } + + property("Bulk connecting a Vec and Seq of different sizes should report a ChiselException") { + a [ChiselException] should be thrownBy { + elaborate(new Module { + val io = IO(new Bundle { + val out = Output(Vec(4, UInt(8.W))) + }) + val seq = Seq.fill(5)(0.U) + io.out <> seq + }) + } + } } |
