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| author | Schuyler Eldridge | 2019-09-25 15:27:18 -0400 |
|---|---|---|
| committer | Schuyler Eldridge | 2019-09-25 15:27:18 -0400 |
| commit | e0238a23176e416836e6647b91390695e1b366c4 (patch) | |
| tree | 22433953fe6e3ef7718b771b6614232b5215ea4f | |
| parent | 70b59235cfef3c0391ddee0e406bc806e11a1557 (diff) | |
Simplify data types README description
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
| -rw-r--r-- | README.md | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -110,7 +110,7 @@ These simulation-based verification tools are available for Chisel: If you are migrating from Chisel2, see [the migration guide on the wiki](https://github.com/ucb-bar/chisel3/wiki/Chisel3-vs-Chisel2). ### Data Types Overview -These are the base data types for defining circuit wires (abstract types which may not be instantiated are greyed out): +These are the base data types for defining circuit components:  |
