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authorSchuyler Eldridge2018-11-02 18:53:04 -0400
committerGitHub2018-11-02 18:53:04 -0400
commita3ad8a4d16be8f1ae11930a803fbcf6ce5be7662 (patch)
tree725b737940e0bfe0c1e0962dd43bab9390f72066
parenta6f22d467f2bc7d83e1dc94da3a7f354c4dc9d7d (diff)
parent8f93b33e3d98341965d635060e1b84502d2ffd72 (diff)
Merge pull request #923 from freechipsproject/addstatustoreadme
Add CircleCI status badge to README
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# Chisel 3
[![Join the chat at https://gitter.im/freechipsproject/chisel3](https://badges.gitter.im/freechipsproject/chisel3.svg)](https://gitter.im/freechipsproject/chisel3?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge)
+[![CircleCI](https://circleci.com/gh/freechipsproject/chisel3/tree/master.svg?style=shield)](https://circleci.com/gh/freechipsproject/chisel3/tree/master)
Chisel is a new hardware construction language to support advanced hardware design and circuit generation.
The latest iteration of [Chisel](https://chisel.eecs.berkeley.edu/) is Chisel3,