diff options
| author | Wesley W. Terpstra | 2018-06-18 19:40:17 +0200 |
|---|---|---|
| committer | Jack Koenig | 2018-06-18 10:40:17 -0700 |
| commit | 4cccd877c25116a1f0b90824aabfc689d7fe50ea (patch) | |
| tree | 6edf8b11b877995534bd202ecd95ccb2eb83468c | |
| parent | d0cdd3b4c3713bb7454868fac7fa9c43bae2332c (diff) | |
Fixed UIntToOH(x, 1) invocation with x.width == 0 (#778)
| -rw-r--r-- | src/main/scala/chisel3/util/OneHot.scala | 3 | ||||
| -rw-r--r-- | src/test/scala/chiselTests/OneHotMuxSpec.scala | 14 |
2 files changed, 15 insertions, 2 deletions
diff --git a/src/main/scala/chisel3/util/OneHot.scala b/src/main/scala/chisel3/util/OneHot.scala index 8a0bb9fc..a6af0d99 100644 --- a/src/main/scala/chisel3/util/OneHot.scala +++ b/src/main/scala/chisel3/util/OneHot.scala @@ -45,9 +45,10 @@ object UIntToOH { def apply(in: UInt): UInt = 1.U << in def apply(in: UInt, width: Int): UInt = width match { case 0 => 0.U(0.W) + case 1 => 1.U(1.W) case _ => val shiftAmountWidth = log2Ceil(width) - val shiftAmount = in.pad(shiftAmountWidth)((shiftAmountWidth - 1) max 0, 0) + val shiftAmount = in.pad(shiftAmountWidth)(shiftAmountWidth - 1, 0) (1.U << shiftAmount)(width - 1, 0) } } diff --git a/src/test/scala/chiselTests/OneHotMuxSpec.scala b/src/test/scala/chiselTests/OneHotMuxSpec.scala index e12d7913..be252bef 100644 --- a/src/test/scala/chiselTests/OneHotMuxSpec.scala +++ b/src/test/scala/chiselTests/OneHotMuxSpec.scala @@ -43,6 +43,14 @@ class OneHotMuxSpec extends FreeSpec with Matchers with ChiselRunners { "UIntToOH with output width greater than 2^(input width)" in { assertTesterPasses(new UIntToOHTester) } + "UIntToOH should not accept width of zero (until zero-width wires are fixed" in { + intercept[java.lang.IllegalArgumentException] { + assertTesterPasses(new BasicTester { + val out = UIntToOH(0.U, 0) + }) + } + } + } class SimpleOneHotTester extends BasicTester { @@ -288,9 +296,13 @@ class DifferentBundleOneHotTester extends BasicTester { class UIntToOHTester extends BasicTester { val out = UIntToOH(1.U, 3) - require(out.getWidth == 3) assert(out === 2.U) + val out2 = UIntToOH(0.U, 1) + require(out2.getWidth == 1) + assert(out2 === 1.U) + stop() } + |
