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authorducky2015-10-30 16:36:23 -0700
committerPalmer Dabbelt2015-11-02 14:16:16 -0800
commit3fe81229b38c98ae14529a5d41998b010174b67b (patch)
tree11179d14bf6f6e3c744546d7a3e8d4d27af76a0a
parent016d1c22877ca20f1b31c45270a9d51cad492a04 (diff)
Add Scalastyle rule to check lines ending with a ;, fix some instances
-rw-r--r--scalastyle-config.xml6
-rw-r--r--scalastyle-test-config.xml6
-rw-r--r--src/main/scala/Chisel/Bits.scala24
-rw-r--r--src/main/scala/Chisel/util/Mux.scala8
4 files changed, 28 insertions, 16 deletions
diff --git a/scalastyle-config.xml b/scalastyle-config.xml
index ab6b43be..57ef60a2 100644
--- a/scalastyle-config.xml
+++ b/scalastyle-config.xml
@@ -61,6 +61,12 @@
<check level="warning" class="org.scalastyle.scalariform.StructuralTypeChecker" enabled="true"></check>
<check level="warning" class="org.scalastyle.file.RegexChecker" enabled="true">
<parameters>
+ <parameter name="regex"><![CDATA[;(\r|)\n]]></parameter>
+ </parameters>
+ <customMessage>No lines ending with a ;</customMessage>
+ </check>
+ <check level="warning" class="org.scalastyle.file.RegexChecker" enabled="true">
+ <parameters>
<parameter name="regex"><![CDATA[println]]></parameter>
</parameters>
</check>
diff --git a/scalastyle-test-config.xml b/scalastyle-test-config.xml
index 6004b8d5..bf32aacd 100644
--- a/scalastyle-test-config.xml
+++ b/scalastyle-test-config.xml
@@ -60,6 +60,12 @@
<check level="warning" class="org.scalastyle.scalariform.StructuralTypeChecker" enabled="true"></check>
<check level="warning" class="org.scalastyle.file.RegexChecker" enabled="true">
<parameters>
+ <parameter name="regex"><![CDATA[^.*;(\r|)\n]]></parameter>
+ </parameters>
+ <customMessage>No lines ending with a ;</customMessage>
+ </check>
+ <check level="warning" class="org.scalastyle.file.RegexChecker" enabled="true">
+ <parameters>
<parameter name="regex"><![CDATA[println]]></parameter>
</parameters>
</check>
diff --git a/src/main/scala/Chisel/Bits.scala b/src/main/scala/Chisel/Bits.scala
index ddef7603..20136be3 100644
--- a/src/main/scala/Chisel/Bits.scala
+++ b/src/main/scala/Chisel/Bits.scala
@@ -200,16 +200,16 @@ object Bits extends UIntFactory
* types.
*/
abstract trait Num[T <: Data] {
- // def << (b: T): T;
- // def >> (b: T): T;
- //def unary_-(): T;
+ // def << (b: T): T
+ // def >> (b: T): T
+ //def unary_-(): T
// REVIEW TODO: double check ops conventions against FIRRTL
/** Outputs the sum of `this` and `b`. The resulting width is the max of the
* operands plus 1 (should not overflow).
*/
- def + (b: T): T;
+ def + (b: T): T
/** Outputs the product of `this` and `b`. The resulting width is the sum of
* the operands.
@@ -217,36 +217,36 @@ abstract trait Num[T <: Data] {
* @note can generate a single-cycle multiplier, which can result in
* significant cycle time and area costs
*/
- def * (b: T): T;
+ def * (b: T): T
/** Outputs the quotient of `this` and `b`.
*
* TODO: full rules
*/
- def / (b: T): T;
+ def / (b: T): T
- def % (b: T): T;
+ def % (b: T): T
/** Outputs the difference of `this` and `b`. The resulting width is the max
* of the operands plus 1 (should not overflow).
*/
- def - (b: T): T;
+ def - (b: T): T
/** Outputs true if `this` < `b`.
*/
- def < (b: T): Bool;
+ def < (b: T): Bool
/** Outputs true if `this` <= `b`.
*/
- def <= (b: T): Bool;
+ def <= (b: T): Bool
/** Outputs true if `this` > `b`.
*/
- def > (b: T): Bool;
+ def > (b: T): Bool
/** Outputs true if `this` >= `b`.
*/
- def >= (b: T): Bool;
+ def >= (b: T): Bool
/** Outputs the minimum of `this` and `b`. The resulting width is the max of
* the operands. Generates a comparison followed by a mux.
diff --git a/src/main/scala/Chisel/util/Mux.scala b/src/main/scala/Chisel/util/Mux.scala
index 18b5dd53..c2833103 100644
--- a/src/main/scala/Chisel/util/Mux.scala
+++ b/src/main/scala/Chisel/util/Mux.scala
@@ -52,9 +52,9 @@ object MuxLookup {
* @return the value found or the default if not
*/
def apply[S <: UInt, T <: Bits] (key: S, default: T, mapping: Seq[(S, T)]): T = {
- var res = default;
+ var res = default
for ((k, v) <- mapping.reverse)
- res = Mux(k === key, v, res);
+ res = Mux(k === key, v, res)
res
}
@@ -66,9 +66,9 @@ object MuxCase {
* @param mapping a set of data values with associated enables
* @return the first value in mapping that is enabled */
def apply[T <: Bits] (default: T, mapping: Seq[(Bool, T)]): T = {
- var res = default;
+ var res = default
for ((t, v) <- mapping.reverse){
- res = Mux(t, v, res);
+ res = Mux(t, v, res)
}
res
}