index
:
xv6-riscv
riscv
MIT xv6-RISCV kernel modified to RV64I base integer extension
Aditya N. Naik
summary
refs
log
tree
commit
diff
log msg
author
committer
range
Age
Commit message (
Expand
)
Author
2006-07-11
pre-empt both user and kernel, in clock interrupt
rtm
2006-07-11
Changes to allow use of native x86 ELF compilers, which on my
rsc
2006-07-10
queue with disk requests
kaashoek
2006-07-10
oops
kaashoek
2006-07-10
read the disk using interrupts
kaashoek
2006-07-06
disable all interrupts when acquiring lock
kaashoek
2006-07-05
timer interrupts
kaashoek
2006-07-01
swtch saves callee-saved registers
rtm
2006-06-28
disable interrupts when holding kernel lock
kaashoek
2006-06-28
timer interrupts
kaashoek
2006-06-27
file descriptors
rtm
2006-06-26
system call return values
rtm
2006-06-26
stick mpstack in cpu structure
kaashoek
2006-06-26
system call arguments
rtm
2006-06-24
boot more than two CPUs, each on own initial stack
rtm
2006-06-22
bug in trapret
rtm
2006-06-22
compile "user programs"
rtm
2006-06-22
send console output to parallel port
rtm
2006-06-22
oops
kaashoek
2006-06-22
checkpoint. booting second processor. stack is messed up, but thanks to cliff
kaashoek
2006-06-21
start on MP; detect MP configuration
kaashoek
2006-06-16
checkpoint
rtm
2006-06-15
sleep, wakeup, wait, exit
rtm
2006-06-15
primitive fork and exit system calls
rtm
2006-06-13
fix some trap bugs
rtm
2006-06-13
foo
rtm
2006-06-13
more or less take traps/interrupts
rtm
2006-06-12
xx
rtm
2006-06-12
import
rtm