test/passes/expand-whens/partial-init.fir


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; RUN: firrtl %s abcefghipj c | tee %s.out | FileCheck %s 

; CHECK: Expand Whens
circuit top :
   module top :
      reg r : UInt(1)[10]
      r.init.3 := UInt(0)

; CHECK: Finished Expand Whens