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package firrtlTests
import java.io._
import org.scalatest._
import org.scalatest.prop._
import firrtl.{Parser,Circuit}
import firrtl.passes.{Pass,ToWorkingIR,CheckHighForm,ResolveKinds,InferTypes,CheckTypes,PassExceptions}
class UnitTests extends FlatSpec with Matchers {
"Connecting bundles of different types" should "throw an exception" in {
val passes = Seq(
ToWorkingIR,
CheckHighForm,
ResolveKinds,
InferTypes,
CheckTypes)
val input =
"""circuit Unit :
| module Unit :
| input y: {a : UInt<1>}
| output x: {a : UInt<1>, b : UInt<1>}
| x <= y""".stripMargin
intercept[PassExceptions] {
passes.foldLeft(Parser.parse("",input.split("\n").toIterator)) {
(c: Circuit, p: Pass) => p.run(c)
}
}
}
"Initializing a register with a different type" should "throw an exception" in {
val passes = Seq(
ToWorkingIR,
CheckHighForm,
ResolveKinds,
InferTypes,
CheckTypes)
val input =
"""circuit Unit :
| module Unit :
| input clk : Clock
| input reset : UInt<1>
| wire x : { valid : UInt<1> }
| reg y : { valid : UInt<1>, bits : UInt<3> }, clk with :
| reset => (reset, x)""".stripMargin
intercept[PassExceptions] {
passes.foldLeft(Parser.parse("",input.split("\n").toIterator)) {
(c: Circuit, p: Pass) => p.run(c)
}
}
}
}
|
