1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
|
// See LICENSE for license details.
package firrtlTests
import firrtl._
import firrtl.ir._
import firrtl.passes._
import firrtl.transforms._
import firrtl.Mappers._
import annotations._
import java.io.File
import java.nio.file.Paths
class CheckCombLoopsSpec extends SimpleTransformSpec {
def emitter = new LowFirrtlEmitter
def transforms = Seq(
new ChirrtlToHighFirrtl,
new IRToWorkingIR,
new ResolveAndCheck,
new HighFirrtlToMiddleFirrtl,
new MiddleFirrtlToLowFirrtl
)
"Loop-free circuit" should "not throw an exception" in {
val input = """circuit hasnoloops :
| module thru :
| input in1 : UInt<1>
| input in2 : UInt<1>
| output out1 : UInt<1>
| output out2 : UInt<1>
| out1 <= in1
| out2 <= in2
| module hasnoloops :
| input clk : Clock
| input a : UInt<1>
| output b : UInt<1>
| wire x : UInt<1>
| inst inner of thru
| inner.in1 <= a
| x <= inner.out1
| inner.in2 <= x
| b <= inner.out2
|""".stripMargin
val writer = new java.io.StringWriter
compile(CircuitState(parse(input), ChirrtlForm), writer)
}
"Simple combinational loop" should "throw an exception" in {
val input = """circuit hasloops :
| module hasloops :
| input clk : Clock
| input a : UInt<1>
| input b : UInt<1>
| output c : UInt<1>
| output d : UInt<1>
| wire y : UInt<1>
| wire z : UInt<1>
| c <= b
| z <= y
| y <= z
| d <= z
|""".stripMargin
val writer = new java.io.StringWriter
intercept[CheckCombLoops.CombLoopException] {
compile(CircuitState(parse(input), ChirrtlForm), writer)
}
}
"Single-element combinational loop" should "throw an exception" in {
val input = """circuit loop :
| module loop :
| output y : UInt<8>
| wire w : UInt<8>
| w <= w
| y <= w
|""".stripMargin
val writer = new java.io.StringWriter
intercept[CheckCombLoops.CombLoopException] {
compile(CircuitState(parse(input), ChirrtlForm), writer)
}
}
"Node combinational loop" should "throw an exception" in {
val input = """circuit hasloops :
| module hasloops :
| input clk : Clock
| input a : UInt<1>
| input b : UInt<1>
| output c : UInt<1>
| output d : UInt<1>
| wire y : UInt<1>
| c <= b
| node z = and(c,y)
| y <= z
| d <= z
|""".stripMargin
val writer = new java.io.StringWriter
intercept[CheckCombLoops.CombLoopException] {
compile(CircuitState(parse(input), ChirrtlForm), writer)
}
}
"Combinational loop through a combinational memory read port" should "throw an exception" in {
val input = """circuit hasloops :
| module hasloops :
| input clk : Clock
| input a : UInt<1>
| input b : UInt<1>
| output c : UInt<1>
| output d : UInt<1>
| wire y : UInt<1>
| wire z : UInt<1>
| c <= b
| mem m :
| data-type => UInt<1>
| depth => 2
| read-latency => 0
| write-latency => 1
| reader => r
| read-under-write => undefined
| m.r.clk <= clk
| m.r.addr <= y
| m.r.en <= UInt(1)
| z <= m.r.data
| y <= z
| d <= z
|""".stripMargin
val writer = new java.io.StringWriter
intercept[CheckCombLoops.CombLoopException] {
compile(CircuitState(parse(input), ChirrtlForm), writer)
}
}
"Combination loop through an instance" should "throw an exception" in {
val input = """circuit hasloops :
| module thru :
| input in : UInt<1>
| output out : UInt<1>
| out <= in
| module hasloops :
| input clk : Clock
| input a : UInt<1>
| input b : UInt<1>
| output c : UInt<1>
| output d : UInt<1>
| wire y : UInt<1>
| wire z : UInt<1>
| c <= b
| inst inner of thru
| inner.in <= y
| z <= inner.out
| y <= z
| d <= z
|""".stripMargin
val writer = new java.io.StringWriter
intercept[CheckCombLoops.CombLoopException] {
compile(CircuitState(parse(input), ChirrtlForm), writer)
}
}
"Multiple simple loops in one SCC" should "throw an exception" in {
val input = """circuit hasloops :
| module hasloops :
| input i : UInt<1>
| output o : UInt<1>
| wire a : UInt<1>
| wire b : UInt<1>
| wire c : UInt<1>
| wire d : UInt<1>
| wire e : UInt<1>
| a <= and(c,i)
| b <= and(a,d)
| c <= b
| d <= and(c,e)
| e <= b
| o <= e
|""".stripMargin
val writer = new java.io.StringWriter
intercept[CheckCombLoops.CombLoopException] {
compile(CircuitState(parse(input), ChirrtlForm), writer)
}
}
"Circuit" should "create an annotation" in {
val input = """circuit hasnoloops :
| module thru :
| input in1 : UInt<1>
| input in2 : UInt<1>
| output out1 : UInt<1>
| output out2 : UInt<1>
| out1 <= in1
| out2 <= in2
| module hasnoloops :
| input clk : Clock
| input a : UInt<1>
| output b : UInt<1>
| wire x : UInt<1>
| inst inner of thru
| inner.in1 <= a
| x <= inner.out1
| inner.in2 <= x
| b <= inner.out2
|""".stripMargin
val writer = new java.io.StringWriter
val cs = compile(CircuitState(parse(input), ChirrtlForm), writer)
val mn = ModuleName("hasnoloops", CircuitName("hasnoloops"))
cs.annotations.collect {
case c @ CombinationalPath(ComponentName("b", `mn`), Seq(ComponentName("a", `mn`))) => c
}.nonEmpty should be (true)
}
}
class CheckCombLoopsCommandLineSpec extends FirrtlFlatSpec {
val testDir = createTestDirectory("CombLoopChecker")
val inputFile = Paths.get(getClass.getResource("/features/HasLoops.fir").toURI()).toFile()
val outFile = new File(testDir, "HasLoops.v")
val args = Array("-i", inputFile.getAbsolutePath, "-o", outFile.getAbsolutePath, "-X", "verilog")
"Combinational loops detection" should "run by default" in {
a [CheckCombLoops.CombLoopException] should be thrownBy {
firrtl.Driver.execute(args)
}
}
it should "not run when given --no-check-comb-loops option" in {
firrtl.Driver.execute(args :+ "--no-check-comb-loops")
}
}
|
