src/main/scala/firrtl/passes/VerilogRename.scala


1
2
3
4
5
6
7
8
9
10
11

package firrtl.passes
import firrtl.ir.Circuit
import firrtl.transforms.VerilogRename

@deprecated("Use transforms.VerilogRename, will be removed in 1.3", "1.2")
object VerilogRename extends Pass {
  override def run(c: Circuit): Circuit = new VerilogRename().run(c)
  @deprecated("Use transforms.VerilogRename, will be removed in 1.3", "1.2")
  def verilogRenameN(n: String): String =
    if (firrtl.Utils.v_keywords(n)) "%s$".format(n) else n
}