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TODO
Figure out how widths propogate for all updated primops
Remove letrec. Add to expressions: Register(input,en), ReadPort(mem,index,enable), WritePort(mem,index,enable)
Add bit-reduce-and etc to primops
Write pass to rename identifiers (alpha-transform)
Add partial bulk connect
Update spec
add new field for sequential or combinational
add assertions
Future questions to address in spec:
Introduction – motivation, and intended usage
Philosophical justifications for all constructs
More introduction for types, e.g. what is a ground type?
What is a statement? What is an expression? What is a memory? Difference between vector type and memory? What are accessors for?
Why would I ever write an empty statement? Mainly for use by compiler/passes
What is a structural element? Duplication?
Subtracting two unsigned numbers… Should talk to a math guy to figure it out
What are shift left and shift right operations? HW doesn’t have these concepts. Need justification.
What is lowered form? What is it for?
Tests:
Error if declare anything other than module in circuit
Error if incorrectly assign stuff, like use = instead of :=
Error: Node not parsed for stmts
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