#include<"core/stringeater.stanza">
#include<"core/macro-utils.stanza">
#include<"compiler/stz-algorithms.stanza">
#include<"compiler/stz-parser.stanza">
#include<"compiler/stz-lexer.stanza">
#include("firrtl-lexer.stanza")
#include("firrtl-ir.stanza")
#include("ir-utils.stanza")
#include("ir-parser.stanza")
#include("passes.stanza")
#include("primop.stanza")
#include("errors.stanza")
#include("compilers.stanza")
#include("flo.stanza")
#include("verilog.stanza")

;Custom Packages
#include("custom-passes.stanza")
#include("custom-compiler.stanza")

defpackage firrtl-main :
   import core
   import verse
   import firrtl/parser
   import firrtl/passes
   import firrtl/lexer
   import stz/parser
   import firrtl/ir-utils
   import firrtl/compiler
   ;Custom Packages
   import firrtl/custom-passes
   import firrtl/custom-compiler

defn set-printvars! (p:List<Char>) :
   if contains(p,'t') : PRINT-TYPES = true
   if contains(p,'k') : PRINT-KINDS = true
   if contains(p,'w') : PRINT-WIDTHS = true
   if contains(p,'T') : PRINT-TWIDTHS = true
   if contains(p,'g') : PRINT-GENDERS = true
   if contains(p,'c') : PRINT-CIRCUITS = true
   if contains(p,'d') : PRINT-DEBUG = true
   if contains(p,'i') : PRINT-INFO = true

defn get-passes (pass-names:List<String>) -> List<Pass> :
   for n in pass-names map :
      val p = for p in standard-passes find :
         n == short-name(p)
      if p == false :
         error(to-string $ ["Unrecognized pass flag: " n])
      p as Pass
         
defn main () :
   val args = commandline-arguments()
   var input = false
   var output = false
   var compiler = false
   val pass-names = Vector<String>()
   val pass-args = Vector<String>()
   var printvars = ""
   for (s in args, i in 0 to false) do :
      if s == "-i" : input = args[i + 1]
      if s == "-o" : output = args[i + 1]
      if s == "-x" : add(pass-names,args[i + 1])
      if s == "-X" : compiler = args[i + 1]
      if s == "-p" : printvars = args[i + 1]
      if s == "-s" : add(pass-args,args[i + 1])

   if input == false : 
      error("No input file provided. Use -i flag.")
   if output == false : 
      error("No output file provided. Use -o flag.")
   if compiler == false and length(pass-names) == 0 :
      error("Must specify a compiler. Use -X flag.")

   val lexed = lex-file(input as String)
   val c = parse-firrtl(lexed)
   set-printvars!(to-list(printvars))
   
   if compiler == false :
      run-passes(c,get-passes(to-list(pass-names)))
   else :
      switch {_ == compiler} :
         "flo" : run-passes(c,StandardFlo(output as String))
         "verilog" : run-passes(c,StandardVerilog(output as String))
         "verilute" : run-passes(c,InstrumentedVerilog(output as String,to-list $ pass-args))
         else : error("Invalid compiler flag")

main()