/src/main/scala/firrtl/passes/

• ../
• CheckChirrtl.scala
• CheckInitialization.scala
• CheckWidths.scala
• Checks.scala
• CommonSubexpressionElimination.scala
• ConvertFixedToSInt.scala
• ExpandWhens.scala
• InferBinaryPoints.scala
• InferTypes.scala
• InferWidths.scala
• Inline.scala
• LowerTypes.scala
• PadWidths.scala
• Passes.scala
• RemoveAccesses.scala
• RemoveCHIRRTL.scala
• RemoveEmpty.scala
• RemoveIntervals.scala
• RemoveValidIf.scala
• ReplaceAccesses.scala
• Resolves.scala
• SplitExpressions.scala
• TrimIntervals.scala
• Uniquify.scala
• VerilogModulusCleanup.scala
• VerilogRename.scala
• ZeroWidth.scala
• clocklist
• memlib
• wiring