From 95dd261b4e65840ade351dcb00e4164a99daf654 Mon Sep 17 00:00:00 2001 From: azidar Date: Fri, 20 Feb 2015 16:56:25 -0800 Subject: Rewrote the initialize-register pass, now correctly implemented with a new IR construct - Null. LetRec is not implemented, but is marked with a TODO. Test cases for this pass are now located in test/passes/initialize-register --- test/hello.fir | 2 ++ test/passes/initialize-register/begin.fir | 22 ++++++++++++++ test/passes/initialize-register/when.fir | 40 ++++++++++++++++++++++++++ test/passes/make-explicit-reset/abc.fir | 27 +++++++++++++++++ test/passes/resolve-kinds/ab.fir | 48 +++++++++++++++++++++++++++++++ test/simple.fir | 11 +++++++ test/syntax/letrec-non-struct.fir | 9 ++++++ test/unit/gcd.fir | 48 ------------------------------- test/unit/hello.fir | 2 -- test/unit/simple.fir | 11 ------- 10 files changed, 159 insertions(+), 61 deletions(-) create mode 100644 test/hello.fir create mode 100644 test/passes/initialize-register/begin.fir create mode 100644 test/passes/initialize-register/when.fir create mode 100644 test/passes/make-explicit-reset/abc.fir create mode 100644 test/passes/resolve-kinds/ab.fir create mode 100644 test/simple.fir create mode 100644 test/syntax/letrec-non-struct.fir delete mode 100644 test/unit/gcd.fir delete mode 100644 test/unit/hello.fir delete mode 100644 test/unit/simple.fir (limited to 'test') diff --git a/test/hello.fir b/test/hello.fir new file mode 100644 index 00000000..4a905ab9 --- /dev/null +++ b/test/hello.fir @@ -0,0 +1,2 @@ +# RUN: echo hello | FileCheck %s +# CHECK: hello diff --git a/test/passes/initialize-register/begin.fir b/test/passes/initialize-register/begin.fir new file mode 100644 index 00000000..9d4de49e --- /dev/null +++ b/test/passes/initialize-register/begin.fir @@ -0,0 +1,22 @@ +; RUN: firrtl %s abcd | tee %s.out | FileCheck %s + + circuit top : + module top : + input a : UInt(16) + input b : UInt(16) + output z : UInt + + reg r1 : UInt +; CHECK: wire [[R1:gen[0-9]*]] : UInt +; CHECK: n:[[R1]] := Null + + reg r2 : UInt + r2.init := UInt(0) +; CHECK: wire [[R2:gen[0-9]*]] : UInt +; CHECK-NOT: reg:r2 := n:[[R2]] +; CHECK: n:[[R2]] := Null +; CHECK: n:[[R2]] := UInt(0) + +; CHECK: when port:reset : +; CHECK-DAG: reg:r1 := n:[[R1]] +; CHECK-DAG: reg:r2 := n:[[R2]] diff --git a/test/passes/initialize-register/when.fir b/test/passes/initialize-register/when.fir new file mode 100644 index 00000000..e4749abe --- /dev/null +++ b/test/passes/initialize-register/when.fir @@ -0,0 +1,40 @@ +; RUN: firrtl %s abcd | tee %s.out | FileCheck %s +; CHECK: circuit top : + circuit top : + module top : + input a : UInt(16) + input b : UInt(16) + output z : UInt + when greater(1, 2) : + reg r1: UInt + r1.init := UInt(12) +; CHECK: wire [[R1:gen[0-9]*]] : UInt +; CHECK-NOT: reg:r1 := n:[[R1]] +; CHECK: n:[[R1]] := Null +; CHECK: n:[[R1]] := UInt(12) +; CHECK-NOT: r1.init := UInt(12) + reg r2: UInt +; CHECK: wire [[R2:gen[0-9]*]] : UInt +; CHECK-NOT: reg:r2 := n:[[R2]] +; CHECK: n:[[R2]] := Null + +; CHECK: when port:reset : +; CHECK-DAG: reg:r2 := n:[[R2]] +; CHECK-DAG: reg:r1 := n:[[R1]] + else : + reg r1: UInt + r1.init := UInt(12) +; CHECK: wire [[R1:gen[0-9]*]] : UInt +; CHECK-NOT: reg:r1 := n:[[R1]] +; CHECK: n:[[R1]] := Null +; CHECK: n:[[R1]] := UInt(12) +; CHECK-NOT: r1.init := UInt(12) + + reg r2: UInt +; CHECK: wire [[R2:gen[0-9]*]] : UInt +; CHECK-NOT: reg:r2 := n:[[R2]] +; CHECK: n:[[R2]] := Null + +; CHECK: when port:reset : +; CHECK-DAG: reg:r2 := n:[[R2]] +; CHECK-DAG: reg:r1 := n:[[R1]] diff --git a/test/passes/make-explicit-reset/abc.fir b/test/passes/make-explicit-reset/abc.fir new file mode 100644 index 00000000..caed07ab --- /dev/null +++ b/test/passes/make-explicit-reset/abc.fir @@ -0,0 +1,27 @@ +; RUN: firrtl %s abc | tee %s.out | FileCheck %s + +circuit top : + module A : + ;CHECK: input reset : UInt(1) + input x : UInt(16) + output y : UInt(16) + inst b of B + ;CHECK: inst:b.reset := port:reset + module B : + input reset : UInt(1) + ;CHECK: input reset : UInt(1) + input x : UInt(16) + output y : UInt(16) + inst c of C + ;CHECK: inst:c.reset := port:reset + module C : + ;CHECK: input reset : UInt(1) + input a : UInt(16) + input b : UInt(16) + module top : + ;CHECK: input reset : UInt(1) + input a : UInt(16) + input b : UInt(16) + output z : UInt + inst a of A + ;CHECK: inst:a.reset := port:reset diff --git a/test/passes/resolve-kinds/ab.fir b/test/passes/resolve-kinds/ab.fir new file mode 100644 index 00000000..e6f28c21 --- /dev/null +++ b/test/passes/resolve-kinds/ab.fir @@ -0,0 +1,48 @@ +; RUN: firrtl %s ab | tee %s.out | FileCheck %s + +circuit top : + module subtracter : + input x : UInt + input y : UInt + output z : UInt + z := sub-mod(x, y) +; CHECK: port:z := sub-mod(port:x, port:y) + module gcd : + input a : UInt(16) + input b : UInt(16) + input e : UInt(1) + output z : UInt(16) + output v : UInt(1) + reg x : UInt + reg y : UInt + x.init := UInt(0) + y.init := UInt(42) + when greater(x, y) : + inst s of subtracter + s.x := x +; CHECK: inst:s.x := reg:x + s.y := y + x := s.z + else : + inst s2 of subtracter + s2.x := x + s2.y := y + y := s2.z + when e : + x := a + y := b + v := equal(v, UInt(0)) + z := x + module top : + input a : UInt(16) + input b : UInt(16) + output z : UInt + inst i of gcd +; CHECK: inst i of module:gcd + i.a := a + i.b := b + i.e := UInt(1) + z := i.z +; CHECK: port:z := inst:i.z + + diff --git a/test/simple.fir b/test/simple.fir new file mode 100644 index 00000000..d00f8f7a --- /dev/null +++ b/test/simple.fir @@ -0,0 +1,11 @@ +; RUN: firrtl %s ab | tee %s.out | FileCheck %s + +circuit top : + module subtracter : + input x : UInt + input y : UInt + output z : UInt + z := sub-mod(x, y) +; CHECK: output z : UInt +; CHECK: port:z := sub-mod(port:x, port:y) + diff --git a/test/syntax/letrec-non-struct.fir b/test/syntax/letrec-non-struct.fir new file mode 100644 index 00000000..37fb2123 --- /dev/null +++ b/test/syntax/letrec-non-struct.fir @@ -0,0 +1,9 @@ +; RUN: firrtl %s | tee %s.out | FileCheck %s +circuit top: + module top: + input x : UInt(16) + output y : UInt(16) + letrec: + reg r : UInt(10) + in: + r := UInt(11) diff --git a/test/unit/gcd.fir b/test/unit/gcd.fir deleted file mode 100644 index e6f28c21..00000000 --- a/test/unit/gcd.fir +++ /dev/null @@ -1,48 +0,0 @@ -; RUN: firrtl %s ab | tee %s.out | FileCheck %s - -circuit top : - module subtracter : - input x : UInt - input y : UInt - output z : UInt - z := sub-mod(x, y) -; CHECK: port:z := sub-mod(port:x, port:y) - module gcd : - input a : UInt(16) - input b : UInt(16) - input e : UInt(1) - output z : UInt(16) - output v : UInt(1) - reg x : UInt - reg y : UInt - x.init := UInt(0) - y.init := UInt(42) - when greater(x, y) : - inst s of subtracter - s.x := x -; CHECK: inst:s.x := reg:x - s.y := y - x := s.z - else : - inst s2 of subtracter - s2.x := x - s2.y := y - y := s2.z - when e : - x := a - y := b - v := equal(v, UInt(0)) - z := x - module top : - input a : UInt(16) - input b : UInt(16) - output z : UInt - inst i of gcd -; CHECK: inst i of module:gcd - i.a := a - i.b := b - i.e := UInt(1) - z := i.z -; CHECK: port:z := inst:i.z - - diff --git a/test/unit/hello.fir b/test/unit/hello.fir deleted file mode 100644 index 4a905ab9..00000000 --- a/test/unit/hello.fir +++ /dev/null @@ -1,2 +0,0 @@ -# RUN: echo hello | FileCheck %s -# CHECK: hello diff --git a/test/unit/simple.fir b/test/unit/simple.fir deleted file mode 100644 index d00f8f7a..00000000 --- a/test/unit/simple.fir +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: firrtl %s ab | tee %s.out | FileCheck %s - -circuit top : - module subtracter : - input x : UInt - input y : UInt - output z : UInt - z := sub-mod(x, y) -; CHECK: output z : UInt -; CHECK: port:z := sub-mod(port:x, port:y) - -- cgit v1.2.3