From 6ad6267d26b52258f6e0d4d004aeb5f36856cf95 Mon Sep 17 00:00:00 2001 From: azidar Date: Wed, 4 Mar 2015 16:25:25 -0800 Subject: Finished infer-types pass --- test/passes/infer-types/bundle.fir | 13 ++ test/passes/infer-types/gcd.fir | 20 +-- test/passes/infer-types/primops.fir | 222 ++++++++++++++++--------------- test/passes/initialize-register/when.fir | 2 +- test/passes/resolve-kinds/gcd.fir | 6 +- 5 files changed, 144 insertions(+), 119 deletions(-) create mode 100644 test/passes/infer-types/bundle.fir (limited to 'test') diff --git a/test/passes/infer-types/bundle.fir b/test/passes/infer-types/bundle.fir new file mode 100644 index 00000000..10a839a1 --- /dev/null +++ b/test/passes/infer-types/bundle.fir @@ -0,0 +1,13 @@ +; RUN: firrtl %s abcde ct | tee %s.out | FileCheck %s + +;CHECK: Infer Types +circuit top : + module subtracter : + wire z : {input x : UInt, output y: SInt} + node x = z.x ;CHECK: node x = z@, output y : SInt@}>.x@ + node y = z.y ;CHECK: node y = z@, output y : SInt@}>.y@ + + wire a : UInt(3)[10] ;CHECK: wire a : UInt(3)[10]@@> + node b = a.2 ;CHECK: node b = a@>.2@ + accessor c = a[UInt(3)] ;CHECK: unknown accessor c = a@>[UInt(3)] +; CHECK: Finished Infer Types diff --git a/test/passes/infer-types/gcd.fir b/test/passes/infer-types/gcd.fir index 4fdc9ab1..b60c4f38 100644 --- a/test/passes/infer-types/gcd.fir +++ b/test/passes/infer-types/gcd.fir @@ -6,8 +6,8 @@ circuit top : input x : UInt input y : UInt output z : UInt - z := sub-mod(x, y) - ;CHECK: z@ := sub-mod(x@, y@)@ + z := sub-wrap(x, y) + ;CHECK: z@ := sub-wrap(x@, y@)@ module gcd : input a : UInt(16) input b : UInt(16) @@ -19,17 +19,17 @@ circuit top : ; CHECK: reg x : UInt x.init := UInt(0) y.init := UInt(42) - when greater(x, y) : - ;CHECK: when greater(x@, y@)@ : + when gt(x, y) : + ;CHECK: when gt(x@, y@)@ : inst s of subtracter - ;CHECK: inst s of subtracter@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}> + ;CHECK: inst s of subtracter@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}> s.x := x s.y := y x := s.z - ;CHECK: s@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}>.reset@ := reset@ - ;CHECK: s@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}>.x@ := x@ - ;CHECK: s@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}>.y@ := y@ - ;CHECK: x@ := s@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}>.z@ + ;CHECK: s@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}>.reset@ := reset@ + ;CHECK: s@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}>.x@ := x@ + ;CHECK: s@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}>.y@ := y@ + ;CHECK: x@ := s@, input y : UInt@, output z : UInt@, input reset : UInt(1)@}>.z@ else : inst s2 of subtracter s2.x := x @@ -39,7 +39,7 @@ circuit top : x := a y := b v := equal(v, UInt(0)) - ;CHECK: v@ := equal(v@, UInt(0))@ + ;CHECK: v@ := equal(v@, UInt(0))@ z := x module top : input a : UInt(16) diff --git a/test/passes/infer-types/primops.fir b/test/passes/infer-types/primops.fir index 2a29efbf..7e7342ae 100644 --- a/test/passes/infer-types/primops.fir +++ b/test/passes/infer-types/primops.fir @@ -7,110 +7,122 @@ circuit top : wire b : UInt(8) wire c : SInt(16) wire d : SInt(8) + wire e : UInt(1) - ;add - module add : - node w = adduu(a,b) ;CHECK: node w = adduu(a@,b@)@ - node x = addus(a,d) ;CHECK: node x = addus(a@,d@)@ - node y = addsu(c,b) ;CHECK: node y = addsu(c@,b@)@ - node z = addss(c,d) ;CHECK: node z = addss(c@,d@)@ - ;sub - module sub : - node w = subuu(a,b) ;CHECK: node w = subuu(a@,b@)@ - node x = subus(a,d) ;CHECK: node x = subus(a@,d@)@ - node y = subsu(c,b) ;CHECK: node y = subsu(c@,b@)@ - node z = subss(c,d) ;CHECK: node z = subss(c@,d@)@ - ;mul - module mul : - node w = muluu(a,b) ;CHECK: node w = muluu(a@,b@)@ - node x = mulus(a,d) ;CHECK: node x = mulus(a@,d@)@ - node y = mulsu(c,b) ;CHECK: node y = mulsu(c@,b@)@ - node z = mulss(c,d) ;CHECK: node z = mulss(c@,d@)@ - ;div - module div : - node w = divuu(a,b) ;CHECK: node w = divuu(a@,b@)@ - node x = divus(a,d) ;CHECK: node x = divus(a@,d@)@ - node y = divsu(c,b) ;CHECK: node y = divsu(c@,b@)@ - node z = divss(c,d) ;CHECK: node z = divss(c@,d@)@ - ;mod - module mod : - node w = moduu(a,b) ;CHECK: node w = moduu(a@,b@)@ - node x = modus(a,d) ;CHECK: node x = modus(a@,d@)@ - node y = modsu(c,b) ;CHECK: node y = modsu(c@,b@)@ - node z = modss(c,d) ;CHECK: node z = modss(c@,d@)@ - ;rem - module rem : - node w = remuu(a,b) ;CHECK: node w = remuu(a@,b@)@ - node x = remus(a,d) ;CHECK: node x = remus(a@,d@)@ - node y = remsu(c,b) ;CHECK: node y = remsu(c@,b@)@ - node z = remss(c,d) ;CHECK: node z = remss(c@,d@)@ - ;add-mod - module add-mod : - node w = add-moduu(a,b) ;CHECK: node w = add-moduu(a@,b@)@ - node x = add-modus(a,d) ;CHECK: node x = add-modus(a@,d@)@ - node y = add-modsu(c,b) ;CHECK: node y = add-modsu(c@,b@)@ - node z = add-modss(c,d) ;CHECK: node z = add-modss(c@,d@)@ - ;sub-mod - module sub-mod : - node w = sub-moduu(a,b) ;CHECK: node w = sub-moduu(a@,b@)@ - node x = sub-modus(a,d) ;CHECK: node x = sub-modus(a@,d@)@ - node y = sub-modsu(c,b) ;CHECK: node y = sub-modsu(c@,b@)@ - node z = sub-modss(c,d) ;CHECK: node z = sub-modss(c@,d@)@ - ;lt - module lt : - node w = ltuu(a,b) ;CHECK: node w = ltuu(a@,b@)@ - node x = ltus(a,d) ;CHECK: node x = ltus(a@,d@)@ - node y = ltsu(c,b) ;CHECK: node y = ltsu(c@,b@)@ - node z = ltss(c,d) ;CHECK: node z = ltss(c@,d@)@ - ;leq - module leq : - node w = lequu(a,b) ;CHECK: node w = lequu(a@,b@)@ - node x = lequs(a,d) ;CHECK: node x = lequs(a@,d@)@ - node y = leqsu(c,b) ;CHECK: node y = leqsu(c@,b@)@ - node z = leqss(c,d) ;CHECK: node z = leqss(c@,d@)@ - ;gt - module gt : - node w = gtuu(a,b) ;CHECK: node w = gtuu(a@,b@)@ - node x = gtus(a,d) ;CHECK: node x = gtus(a@,d@)@ - node y = gtsu(c,b) ;CHECK: node y = gtsu(c@,b@)@ - node z = gtss(c,d) ;CHECK: node z = gtss(c@,d@)@ - ;geq - module geq : - node w = gequu(a,b) ;CHECK: node w = gequu(a@,b@)@ - node x = gequs(a,d) ;CHECK: node x = gequs(a@,d@)@ - node y = geqsu(c,b) ;CHECK: node y = geqsu(c@,b@)@ - node z = geqss(c,d) ;CHECK: node z = geqss(c@,d@)@ - ;pad - module pad : - node w = paduu(a,b) ;CHECK: node w = paduu(a@,b@)@ - node x = padus(a,d) ;CHECK: node x = padus(a@,d@)@ - node y = padsu(c,b) ;CHECK: node y = padsu(c@,b@)@ - node z = padss(c,d) ;CHECK: node z = padss(c@,d@)@ - ;and - module and : - node w = and(a,b) ;CHECK: node w = and(a@,b@)@ - module or : - node w = or(a,b) ;CHECK: node w = or(a@,b@)@ - module xor : - node w = xor(a,b) ;CHECK: node w = xor(a@,b@)@ - ;concat - node w = concat(a,b) ;CHECK: node w = concat(a@,b@)@ - ;equal - node w = equaluu(a,b) ;CHECK: node w = equaluu(a@,b@)@ - node x = equalus(a,d) ;CHECK: node x = equalus(a@,d@)@ - node y = equalsu(c,b) ;CHECK: node y = equalsu(c@,b@)@ - node z = equalss(c,d) ;CHECK: node z = equalss(c@,d@)@ - ;mux - node w = muxuu(e,a,b) ;CHECK: node w = muxuu(e@,a@,b@)@ - node x = muxus(e,a,d) ;CHECK: node x = muxus(e@,a@,d@)@ - node y = muxsu(e,c,b) ;CHECK: node y = muxsu(e@,c@,b@)@ - node z = muxss(e,c,d) ;CHECK: node z = muxss(e@,c@,d@)@ - ;shl - ;shr - ;bit - ;bits - - - - + node vadd = add(a, c) ;CHECK: node vadd = add(a@, c@)@ + node wadd-uu = add-uu(a, b) ;CHECK: node wadd-uu = add-uu(a@, b@)@ + node xadd-us = add-us(a, d) ;CHECK: node xadd-us = add-us(a@, d@)@ + node yadd-su = add-su(c, b) ;CHECK: node yadd-su = add-su(c@, b@)@ + node zadd-ss = add-ss(c, d) ;CHECK: node zadd-ss = add-ss(c@, d@)@ + + node vsub = sub(a, c) ;CHECK: node vsub = sub(a@, c@)@ + node wsub-uu = sub-uu(a, b) ;CHECK: node wsub-uu = sub-uu(a@, b@)@ + node xsub-us = sub-us(a, d) ;CHECK: node xsub-us = sub-us(a@, d@)@ + node ysub-su = sub-su(c, b) ;CHECK: node ysub-su = sub-su(c@, b@)@ + node zsub-ss = sub-ss(c, d) ;CHECK: node zsub-ss = sub-ss(c@, d@)@ + + node vmul = mul(a, c) ;CHECK: node vmul = mul(a@, c@)@ + node wmul-uu = mul-uu(a, b) ;CHECK: node wmul-uu = mul-uu(a@, b@)@ + node xmul-us = mul-us(a, d) ;CHECK: node xmul-us = mul-us(a@, d@)@ + node ymul-su = mul-su(c, b) ;CHECK: node ymul-su = mul-su(c@, b@)@ + node zmul-ss = mul-ss(c, d) ;CHECK: node zmul-ss = mul-ss(c@, d@)@ + + node vdiv = div(a, c) ;CHECK: node vdiv = div(a@, c@)@ + node wdiv-uu = div-uu(a, b) ;CHECK: node wdiv-uu = div-uu(a@, b@)@ + node xdiv-us = div-us(a, d) ;CHECK: node xdiv-us = div-us(a@, d@)@ + node ydiv-su = div-su(c, b) ;CHECK: node ydiv-su = div-su(c@, b@)@ + node zdiv-ss = div-ss(c, d) ;CHECK: node zdiv-ss = div-ss(c@, d@)@ + + node vmod = mod(a, c) ;CHECK: node vmod = mod(a@, c@)@ + node wmod-uu = mod-uu(a, b) ;CHECK: node wmod-uu = mod-uu(a@, b@)@ + node xmod-us = mod-us(a, d) ;CHECK: node xmod-us = mod-us(a@, d@)@ + node ymod-su = mod-su(c, b) ;CHECK: node ymod-su = mod-su(c@, b@)@ + node zmod-ss = mod-ss(c, d) ;CHECK: node zmod-ss = mod-ss(c@, d@)@ + + node vquo = quo(a, c) ;CHECK: node vquo = quo(a@, c@)@ + node wquo-uu = quo-uu(a, b) ;CHECK: node wquo-uu = quo-uu(a@, b@)@ + node xquo-us = quo-us(a, d) ;CHECK: node xquo-us = quo-us(a@, d@)@ + node yquo-su = quo-su(c, b) ;CHECK: node yquo-su = quo-su(c@, b@)@ + node zquo-ss = quo-ss(c, d) ;CHECK: node zquo-ss = quo-ss(c@, d@)@ + + node vrem = rem(a, c) ;CHECK: node vrem = rem(a@, c@)@ + node wrem-uu = rem-uu(a, b) ;CHECK: node wrem-uu = rem-uu(a@, b@)@ + node xrem-us = rem-us(a, d) ;CHECK: node xrem-us = rem-us(a@, d@)@ + node yrem-su = rem-su(c, b) ;CHECK: node yrem-su = rem-su(c@, b@)@ + node zrem-ss = rem-ss(c, d) ;CHECK: node zrem-ss = rem-ss(c@, d@)@ + + node vadd-wrap = add-wrap(a, c) ;CHECK: node vadd-wrap = add-wrap(a@, c@)@ + node wadd-wrap-uu = add-wrap-uu(a, b) ;CHECK: node wadd-wrap-uu = add-wrap-uu(a@, b@)@ + node xadd-wrap-us = add-wrap-us(a, d) ;CHECK: node xadd-wrap-us = add-wrap-us(a@, d@)@ + node yadd-wrap-su = add-wrap-su(c, b) ;CHECK: node yadd-wrap-su = add-wrap-su(c@, b@)@ + node zadd-wrap-ss = add-wrap-ss(c, d) ;CHECK: node zadd-wrap-ss = add-wrap-ss(c@, d@)@ + + node vsub-wrap = sub-wrap(a, c) ;CHECK: node vsub-wrap = sub-wrap(a@, c@)@ + node wsub-wrap-uu = sub-wrap-uu(a, b) ;CHECK: node wsub-wrap-uu = sub-wrap-uu(a@, b@)@ + node xsub-wrap-us = sub-wrap-us(a, d) ;CHECK: node xsub-wrap-us = sub-wrap-us(a@, d@)@ + node ysub-wrap-su = sub-wrap-su(c, b) ;CHECK: node ysub-wrap-su = sub-wrap-su(c@, b@)@ + node zsub-wrap-ss = sub-wrap-ss(c, d) ;CHECK: node zsub-wrap-ss = sub-wrap-ss(c@, d@)@ + + node vlt = lt(a, c) ;CHECK: node vlt = lt(a@, c@)@ + node wlt-uu = lt-uu(a, b) ;CHECK: node wlt-uu = lt-uu(a@, b@)@ + node xlt-us = lt-us(a, d) ;CHECK: node xlt-us = lt-us(a@, d@)@ + node ylt-su = lt-su(c, b) ;CHECK: node ylt-su = lt-su(c@, b@)@ + node zlt-ss = lt-ss(c, d) ;CHECK: node zlt-ss = lt-ss(c@, d@)@ + + node vleq = leq(a, c) ;CHECK: node vleq = leq(a@, c@)@ + node wleq-uu = leq-uu(a, b) ;CHECK: node wleq-uu = leq-uu(a@, b@)@ + node xleq-us = leq-us(a, d) ;CHECK: node xleq-us = leq-us(a@, d@)@ + node yleq-su = leq-su(c, b) ;CHECK: node yleq-su = leq-su(c@, b@)@ + node zleq-ss = leq-ss(c, d) ;CHECK: node zleq-ss = leq-ss(c@, d@)@ + + node vgt = gt(a, c) ;CHECK: node vgt = gt(a@, c@)@ + node wgt-uu = gt-uu(a, b) ;CHECK: node wgt-uu = gt-uu(a@, b@)@ + node xgt-us = gt-us(a, d) ;CHECK: node xgt-us = gt-us(a@, d@)@ + node ygt-su = gt-su(c, b) ;CHECK: node ygt-su = gt-su(c@, b@)@ + node zgt-ss = gt-ss(c, d) ;CHECK: node zgt-ss = gt-ss(c@, d@)@ + + node vgeq = geq(a, c) ;CHECK: node vgeq = geq(a@, c@)@ + node wgeq-uu = geq-uu(a, b) ;CHECK: node wgeq-uu = geq-uu(a@, b@)@ + node xgeq-us = geq-us(a, d) ;CHECK: node xgeq-us = geq-us(a@, d@)@ + node ygeq-su = geq-su(c, b) ;CHECK: node ygeq-su = geq-su(c@, b@)@ + node zgeq-ss = geq-ss(c, d) ;CHECK: node zgeq-ss = geq-ss(c@, d@)@ + + node vequal = equal(a, b) ;CHECK: node vequal = equal(a@, b@)@ + node wequal-uu = equal-uu(a, b) ;CHECK: node wequal-uu = equal-uu(a@, b@)@ + node zequal-ss = equal-ss(c, d) ;CHECK: node zequal-ss = equal-ss(c@, d@)@ + + node vmux = mux(e, a, b) ;CHECK: node vmux = mux(e@, a@, b@)@ + node wmux-uu = mux-uu(e, a, b) ;CHECK: node wmux-uu = mux-uu(e@, a@, b@)@ + node zmux-ss = mux-ss(e, c, d) ;CHECK: node zmux-ss = mux-ss(e@, c@, d@)@ + + node vpad = pad(a, 10) ;CHECK: node vpad = pad(a@, 10)@ + node wpad-u = pad-u(a, 10) ;CHECK: node wpad-u = pad-u(a@, 10)@ + node zpad-s = pad-s(c, 10) ;CHECK: node zpad-s = pad-s(c@, 10)@ + + node vas-UInt = as-UInt(d) ;CHECK: node vas-UInt = as-UInt(d@)@ + node was-UInt-u = as-UInt-u(a) ;CHECK: node was-UInt-u = as-UInt-u(a@)@ + node zas-UInt-s = as-UInt-s(c) ;CHECK: node zas-UInt-s = as-UInt-s(c@)@ + + node vas-SInt = as-SInt(a) ;CHECK: node vas-SInt = as-SInt(a@)@ + node was-SInt-u = as-SInt-u(a) ;CHECK: node was-SInt-u = as-SInt-u(a@)@ + node zas-SInt-s = as-SInt-s(c) ;CHECK: node zas-SInt-s = as-SInt-s(c@)@ + + node vshl = shl(a, 10) ;CHECK: node vshl = shl(a@, 10)@ + node wshl-u = shl-u(a, 10) ;CHECK: node wshl-u = shl-u(a@, 10)@ + node zshl-s = shl-s(c, 10) ;CHECK: node zshl-s = shl-s(c@, 10)@ + + node vshr = shr(a, 10) ;CHECK: node vshr = shr(a@, 10)@ + node wshr-u = shr-u(a, 10) ;CHECK: node wshr-u = shr-u(a@, 10)@ + node zshr-s = shr-s(c, 10) ;CHECK: node zshr-s = shr-s(c@, 10)@ + + node vconvert = convert(a) ;CHECK: node vconvert = convert(a@)@ + node wconvert-u = convert-u(a) ;CHECK: node wconvert-u = convert-u(a@)@ + node zconvert-s = convert-s(c) ;CHECK: node zconvert-s = convert-s(c@)@ + + node uand = bit-and(a, b) ;CHECK: node uand = bit-and(a@, b@)@ + node vor = bit-or(a, b) ;CHECK: node vor = bit-or(a@, b@)@ + node wxor = bit-xor(a, b) ;CHECK: node wxor = bit-xor(a@, b@)@ + node xconcat = concat(a, b) ;CHECK: node xconcat = concat(a@, b@)@ + node ybit = bit(a, 0) ;CHECK: node ybit = bit(a@, 0)@ + node zbits = bits(a, 2, 0) ;CHECK: node zbits = bits(a@, 2, 0)@ ;CHECK: Finished Infer Types diff --git a/test/passes/initialize-register/when.fir b/test/passes/initialize-register/when.fir index 4e2bef79..4e0690d8 100644 --- a/test/passes/initialize-register/when.fir +++ b/test/passes/initialize-register/when.fir @@ -6,7 +6,7 @@ input a : UInt(16) input b : UInt(16) output z : UInt - when greater(1, 2) : + when gt(1, 2) : reg r1: UInt r1.init := UInt(12) ; CHECK: wire [[R1:gen[0-9]*]] : UInt diff --git a/test/passes/resolve-kinds/gcd.fir b/test/passes/resolve-kinds/gcd.fir index b06da6c5..f4ad0e05 100644 --- a/test/passes/resolve-kinds/gcd.fir +++ b/test/passes/resolve-kinds/gcd.fir @@ -6,8 +6,8 @@ circuit top : input x : UInt input y : UInt output z : UInt - z := sub-mod(x, y) - ;CHECK: z@ := sub-mod(x@, y@) + z := sub-wrap(x, y) + ;CHECK: z@ := sub-wrap(x@, y@) module gcd : input a : UInt(16) input b : UInt(16) @@ -18,7 +18,7 @@ circuit top : reg y : UInt x.init := UInt(0) y.init := UInt(42) - when greater(x, y) : + when gt(x, y) : inst s of subtracter s.x := x ;CHECK: s@.x := x@ -- cgit v1.2.3