From 2259089f6f6180b5ff3a3baf44e56bc26d12a024 Mon Sep 17 00:00:00 2001
From: azidar
Date: Wed, 19 Aug 2015 17:15:57 -0700
Subject: Added new const propagation test

---
 test/passes/const-prop/bits.fir | 11 +++++++++++
 1 file changed, 11 insertions(+)
 create mode 100644 test/passes/const-prop/bits.fir

(limited to 'test')

diff --git a/test/passes/const-prop/bits.fir b/test/passes/const-prop/bits.fir
new file mode 100644
index 00000000..16d678b3
--- /dev/null
+++ b/test/passes/const-prop/bits.fir
@@ -0,0 +1,11 @@
+; RUN: firrtl -i %s -o %s.v -X verilog -p cT 2>&1 | tee %s.out | FileCheck %s
+
+;CHECK: Constant Propagation
+;CHECK: node x = UInt("h7")
+;CHECK: Finished Constant Propagation
+
+circuit top :
+   module top :
+      output out : UInt
+      node x = bits(UInt(127),2,0)
+      out := x
-- 
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