From 0c7aca561aef907314b0d9c9737fcea04ae6ce82 Mon Sep 17 00:00:00 2001
From: Adam Izraelevitz
Date: Tue, 28 Jul 2015 13:29:55 -0700
Subject: Integrated bigint. Mostly works, but getting "cast" error for make
 Test.

---
 test/chisel3/Test.fir | 9 +++++++++
 1 file changed, 9 insertions(+)
 create mode 100644 test/chisel3/Test.fir

(limited to 'test')

diff --git a/test/chisel3/Test.fir b/test/chisel3/Test.fir
new file mode 100644
index 00000000..aea7acde
--- /dev/null
+++ b/test/chisel3/Test.fir
@@ -0,0 +1,9 @@
+; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s
+; CHECK: Done!
+
+circuit Test : 
+  module Test : 
+     wire x : UInt<10>
+     x := UInt(5151)
+     x := UInt(515151512512412414124124124124)
+
-- 
cgit v1.2.3