From 2353d640907a7b04477b06a5b3da6b7bbafc448d Mon Sep 17 00:00:00 2001
From: azidar
Date: Tue, 24 Feb 2015 09:40:02 -0800
Subject: Updated tests, and included a check for the name of the pass, which
 allows the compiler to print after each pass to ease debugging

---
 test/passes/make-explicit-reset/abc.fir       | 27 --------------------------
 test/passes/make-explicit-reset/mix-reset.fir | 28 +++++++++++++++++++++++++++
 2 files changed, 28 insertions(+), 27 deletions(-)
 delete mode 100644 test/passes/make-explicit-reset/abc.fir
 create mode 100644 test/passes/make-explicit-reset/mix-reset.fir

(limited to 'test/passes/make-explicit-reset')

diff --git a/test/passes/make-explicit-reset/abc.fir b/test/passes/make-explicit-reset/abc.fir
deleted file mode 100644
index caed07ab..00000000
--- a/test/passes/make-explicit-reset/abc.fir
+++ /dev/null
@@ -1,27 +0,0 @@
-; RUN: firrtl %s abc | tee %s.out | FileCheck %s
-
-circuit top :
-   module A :
-      ;CHECK: input reset : UInt(1)
-      input x : UInt(16)
-      output y : UInt(16)
-      inst b of B
-      ;CHECK: inst:b.reset := port:reset
-   module B :
-      input reset : UInt(1)
-      ;CHECK: input reset : UInt(1)
-      input x : UInt(16)
-      output y : UInt(16)
-      inst c of C
-      ;CHECK: inst:c.reset := port:reset
-   module C :
-      ;CHECK: input reset : UInt(1)
-      input a : UInt(16)
-      input b : UInt(16)
-   module top :
-      ;CHECK: input reset : UInt(1)
-      input a : UInt(16)
-      input b : UInt(16)
-      output z : UInt
-      inst a of A
-      ;CHECK: inst:a.reset := port:reset
diff --git a/test/passes/make-explicit-reset/mix-reset.fir b/test/passes/make-explicit-reset/mix-reset.fir
new file mode 100644
index 00000000..23a1232a
--- /dev/null
+++ b/test/passes/make-explicit-reset/mix-reset.fir
@@ -0,0 +1,28 @@
+; RUN: firrtl %s abc | tee %s.out | FileCheck %s
+
+; CHECK: Make Explicit Reset
+circuit top :
+   module A :
+      ;CHECK: input reset : UInt(1)
+      input x : UInt(16)
+      output y : UInt(16)
+      inst b of B
+      ;CHECK: inst:b.reset := port:reset
+   module B :
+      input reset : UInt(1)
+      ;CHECK: input reset : UInt(1)
+      input x : UInt(16)
+      output y : UInt(16)
+      inst c of C
+      ;CHECK: inst:c.reset := port:reset
+   module C :
+      ;CHECK: input reset : UInt(1)
+      input a : UInt(16)
+      input b : UInt(16)
+   module top :
+      ;CHECK: input reset : UInt(1)
+      input a : UInt(16)
+      input b : UInt(16)
+      output z : UInt
+      inst a of A
+      ;CHECK: inst:a.reset := port:reset
-- 
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