From 9b6d8514a3be860562d8d524fa425c87d1537e8a Mon Sep 17 00:00:00 2001
From: azidar
Date: Mon, 13 Jul 2015 16:22:43 -0700
Subject: Added tests for clocks. Added remove scope and special chars passes.
 Added tests. Made more tests pass

---
 test/passes/jacktest/ModuleVec.fir | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'test/passes/jacktest/ModuleVec.fir')

diff --git a/test/passes/jacktest/ModuleVec.fir b/test/passes/jacktest/ModuleVec.fir
index 04c119a1..2fde69f3 100644
--- a/test/passes/jacktest/ModuleVec.fir
+++ b/test/passes/jacktest/ModuleVec.fir
@@ -5,13 +5,13 @@ circuit ModuleVec :
     input in : UInt<32>
     output out : UInt<32>
     
-    node T_33 = add-wrap(in, UInt<1>(1))
+    node T_33 = addw(in, UInt<1>(1))
     out := T_33
   module PlusOne_25 : 
     input in : UInt<32>
     output out : UInt<32>
     
-    node T_34 = add-wrap(in, UInt<1>(1))
+    node T_34 = addw(in, UInt<1>(1))
     out := T_34
   module ModuleVec : 
     input ins : UInt<32>[2]
-- 
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