From 2a9bd217e6d8e519bc78f66e44502d77fa9cdc1d Mon Sep 17 00:00:00 2001
From: azidar
Date: Tue, 29 Sep 2015 15:49:52 -0700
Subject: Added DecToIndexer/DecFromIndexer. Fixed most use cases of incorrect
 catching of initialization of accessors. Missing use case of accessing an
 accessor. Still need to update tests to pass

---
 test/passes/inline-indexers/simple.fir | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 test/passes/inline-indexers/simple.fir

(limited to 'test/passes/inline-indexers/simple.fir')

diff --git a/test/passes/inline-indexers/simple.fir b/test/passes/inline-indexers/simple.fir
new file mode 100644
index 00000000..ca65977b
--- /dev/null
+++ b/test/passes/inline-indexers/simple.fir
@@ -0,0 +1,20 @@
+; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s
+
+;CHECK: Inline Indexers
+circuit top :
+   module top :
+      output o : UInt
+      wire m : UInt<32>[2]
+      wire i : UInt
+      m[0] := UInt("h1")
+      m[1] := UInt("h1")
+      i := UInt("h1")
+      infer accessor a = m[i] 
+      o := a
+
+;CHECK: a := m$0
+;CHECK: when eqv(i_1, UInt("h1")) : a := m$1
+
+
+
+;CHECK: Done!
-- 
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