From 2353d640907a7b04477b06a5b3da6b7bbafc448d Mon Sep 17 00:00:00 2001
From: azidar
Date: Tue, 24 Feb 2015 09:40:02 -0800
Subject: Updated tests, and included a check for the name of the pass, which
 allows the compiler to print after each pass to ease debugging

---
 test/passes/initialize-register/begin.fir | 2 ++
 test/passes/initialize-register/when.fir  | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

(limited to 'test/passes/initialize-register')

diff --git a/test/passes/initialize-register/begin.fir b/test/passes/initialize-register/begin.fir
index 9d4de49e..4f64b071 100644
--- a/test/passes/initialize-register/begin.fir
+++ b/test/passes/initialize-register/begin.fir
@@ -1,5 +1,6 @@
 ; RUN: firrtl %s abcd | tee %s.out | FileCheck %s 
 
+; CHECK: Initialize Registers
          circuit top :
             module top :
                input a : UInt(16)
@@ -12,6 +13,7 @@
 
                reg r2 : UInt
                r2.init := UInt(0)
+; CHECK-NOT:   r2.init := UInt(0)
 ; CHECK:       wire [[R2:gen[0-9]*]] : UInt
 ; CHECK-NOT:   reg:r2 := n:[[R2]]
 ; CHECK:       n:[[R2]] := Null
diff --git a/test/passes/initialize-register/when.fir b/test/passes/initialize-register/when.fir
index e4749abe..c563d639 100644
--- a/test/passes/initialize-register/when.fir
+++ b/test/passes/initialize-register/when.fir
@@ -1,5 +1,6 @@
 ; RUN: firrtl %s abcd | tee %s.out | FileCheck %s 
-; CHECK: circuit top :
+
+; CHECK: Initialize Registers
          circuit top :
             module top :
                input a : UInt(16)
-- 
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