From 9b2f96b8d0b6c7f4e6fefde918d7a335ccd7b7f3 Mon Sep 17 00:00:00 2001
From: azidar
Date: Thu, 30 Jul 2015 11:50:54 -0700
Subject: Updated lots of tests so they pass. Found one bug in expand whens

---
 test/passes/infer-types/bundle.fir | 4 ++--
 test/passes/infer-types/gcd.fir    | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

(limited to 'test/passes/infer-types')

diff --git a/test/passes/infer-types/bundle.fir b/test/passes/infer-types/bundle.fir
index 6309b46f..118734b7 100644
--- a/test/passes/infer-types/bundle.fir
+++ b/test/passes/infer-types/bundle.fir
@@ -20,10 +20,10 @@ circuit top :
       a[8] := UInt(1)
       a[9] := UInt(1)
       node b = a[2]           ;CHECK: node b = a@<t:UInt<3>[10]@<t:UInt>>[2]@<t:UInt>
-      read accessor c = a[UInt(3)] ;CHECK: read accessor c = a@<t:UInt<3>[10]@<t:UInt>>[UInt(3)]
+      read accessor c = a[UInt(3)] ;CHECK: read accessor c = a@<t:UInt<3>[10]@<t:UInt>>[UInt("h00000003")]
 ; CHECK: Finished Infer Types
 ; CHECK: Resolve Genders 
-; CHECK: read accessor c = a@<t:UInt<3>[10]@<t:UInt>>[UInt(3)]   
+; CHECK: read accessor c = a@<t:UInt<3>[10]@<t:UInt>>[UInt("h00000003")]   
 ; CHECK: Finished Resolve Genders 
 
 
diff --git a/test/passes/infer-types/gcd.fir b/test/passes/infer-types/gcd.fir
index 735a69c9..0848457b 100644
--- a/test/passes/infer-types/gcd.fir
+++ b/test/passes/infer-types/gcd.fir
@@ -18,7 +18,7 @@ circuit top :
       output v : UInt<1>
       reg x : UInt,clk,reset
       reg y : UInt,clk,reset
-; CHECK: reg x : UInt
+; CHECK: reg x : UInt, clk@<t:Clock>, reset@<t:UInt>@<t:UInt>
       onreset x := UInt(0)
       onreset y := UInt(42)
       when gt(x, y) :
@@ -40,7 +40,7 @@ circuit top :
          x := a
          y := b
       v := eq(v, UInt(0))
-      ;CHECK: v@<t:UInt> := eq(v@<t:UInt>, UInt(0))@<t:UInt>
+      ;CHECK: v@<t:UInt> := eq(v@<t:UInt>, UInt("h00000000"))@<t:UInt>
       z := x
    module top :
       input a : UInt<16>
-- 
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