From b44b49e6a6589add30b5b1d89d85f2e20432a515 Mon Sep 17 00:00:00 2001
From: azidar
Date: Wed, 27 May 2015 17:15:44 -0700
Subject: Added sequential memories. mem no longer exists, must declare either
 cmem or smem. Added firrtl-gensym utility to generate a hashmap of names

---
 test/passes/expand-whens/two-when.fir | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'test/passes/expand-whens/two-when.fir')

diff --git a/test/passes/expand-whens/two-when.fir b/test/passes/expand-whens/two-when.fir
index 7bee8444..fb537303 100644
--- a/test/passes/expand-whens/two-when.fir
+++ b/test/passes/expand-whens/two-when.fir
@@ -3,7 +3,7 @@
 ; CHECK: Expand Whens
 circuit top :
    module top :
-      mem m :{ x : UInt<1>, y : UInt<1> }[2] 
+      cmem m :{ x : UInt<1>, y : UInt<1> }[2] 
       wire i : UInt<1>
       wire p : UInt<1>
       wire q : { x : UInt<1>, y : UInt<1> }
-- 
cgit v1.2.3