From ba55a55ee07805d28995b535beb5a19bd4a99c5c Mon Sep 17 00:00:00 2001 From: azidar Date: Fri, 31 Jul 2015 16:31:10 -0700 Subject: Added errors for bulk connects where field names match but types/flips don't --- test/features/BulkConnect.fir | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'test/features') diff --git a/test/features/BulkConnect.fir b/test/features/BulkConnect.fir index bf5b330e..9120c4a8 100644 --- a/test/features/BulkConnect.fir +++ b/test/features/BulkConnect.fir @@ -2,18 +2,14 @@ ;CHECK: Lower To Ground circuit Top : module Top : - wire a : { w : UInt<42>, x : UInt<10>, flip y : UInt<42>, z : SInt<42>} + wire a : { w : UInt<42>} a.w := UInt(1) - a.y := UInt(1) - a.z := SInt(1) - wire b : { w : UInt<42>, x : UInt<20>, y : UInt<42>, z : UInt<42>} + wire b : { w : UInt<42>, x : UInt<20>} b.w := UInt(1) b.x := UInt(1) - b.y := UInt(1) - b.z := UInt(1) a <> b ; CHECK: a$w := b$w - ; CHECK: a$x := b$x + ; CHECK-NOT: a$x := b$x ; CHECK-NOT: a$y := b$y ; CHECK-NOT: b$y := a$y ; CHECK-NOT: a$z := b$z -- cgit v1.2.3