From ed04a9040f20c5e04880a18ec036c1a641443c50 Mon Sep 17 00:00:00 2001
From: azidar
Date: Wed, 20 May 2015 01:35:15 -0700
Subject: Added Pad pass to flo.stanza, which pads widths to make := and
 primops strict. Have not tested this

---
 test/errors/high-form/Flip-Mem.fir          | 2 +-
 test/errors/high-form/InstanceNotModule.fir | 2 +-
 test/errors/high-form/InvalidLOC.fir        | 4 +---
 test/errors/high-form/InvalidSubexp.fir     | 2 +-
 test/errors/high-form/NegUInt.fir           | 4 ++--
 test/errors/high-form/Prefix.fir            | 2 +-
 test/errors/high-form/Top.fir               | 2 +-
 test/errors/high-form/Unique.fir            | 2 +-
 test/errors/high-form/WrongReset.fir        | 2 +-
 9 files changed, 10 insertions(+), 12 deletions(-)

(limited to 'test/errors')

diff --git a/test/errors/high-form/Flip-Mem.fir b/test/errors/high-form/Flip-Mem.fir
index 67fae14f..662fc6f1 100644
--- a/test/errors/high-form/Flip-Mem.fir
+++ b/test/errors/high-form/Flip-Mem.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 ; CHECK: Memory m cannot be a bundle type with flips.
 
 circuit Flip-Mem : 
diff --git a/test/errors/high-form/InstanceNotModule.fir b/test/errors/high-form/InstanceNotModule.fir
index 3b228d37..7c4d152a 100644
--- a/test/errors/high-form/InstanceNotModule.fir
+++ b/test/errors/high-form/InstanceNotModule.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 ; CHECK: Module Top2 is not defined.
 
 circuit Top :
diff --git a/test/errors/high-form/InvalidLOC.fir b/test/errors/high-form/InvalidLOC.fir
index 5270577b..cbbb53a9 100644
--- a/test/errors/high-form/InvalidLOC.fir
+++ b/test/errors/high-form/InvalidLOC.fir
@@ -1,5 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
-; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 ; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
 ; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
 ; CHECK: Invalid connect to an expression that is not a reference or a WritePort.
@@ -10,7 +9,6 @@ circuit Top :
   module Top :
     wire x : UInt
     add(x,x) := UInt(1)
-    Pad(x,?) := UInt(1)
     Register(x,x) := UInt(1)
     ReadPort(x,x,x) := UInt(1)
     UInt(1) := UInt(1)
diff --git a/test/errors/high-form/InvalidSubexp.fir b/test/errors/high-form/InvalidSubexp.fir
index 85fad6fb..8116cc2f 100644
--- a/test/errors/high-form/InvalidSubexp.fir
+++ b/test/errors/high-form/InvalidSubexp.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 ; CHECK: Invalid index access to non-reference.
 ; CHECK: Invalid subfield access to non-reference.
 
diff --git a/test/errors/high-form/NegUInt.fir b/test/errors/high-form/NegUInt.fir
index a92da633..9050ac12 100644
--- a/test/errors/high-form/NegUInt.fir
+++ b/test/errors/high-form/NegUInt.fir
@@ -1,5 +1,5 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
-; CHECK: UIntValue cannot be negative.
+; to run: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; to check: UIntValue cannot be negative.
 
 circuit Top :
   module Top :
diff --git a/test/errors/high-form/Prefix.fir b/test/errors/high-form/Prefix.fir
index 17be36f6..2f0a0247 100644
--- a/test/errors/high-form/Prefix.fir
+++ b/test/errors/high-form/Prefix.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 ; CHECK: Reference x$y and x share a prefix.
 
 circuit Top :
diff --git a/test/errors/high-form/Top.fir b/test/errors/high-form/Top.fir
index 1d663c9c..1029d502 100644
--- a/test/errors/high-form/Top.fir
+++ b/test/errors/high-form/Top.fir
@@ -1,5 +1,5 @@
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
 ; CHECK: A single module must be named Top.
 
 circuit Top :
diff --git a/test/errors/high-form/Unique.fir b/test/errors/high-form/Unique.fir
index de95e6cd..26c4c7da 100644
--- a/test/errors/high-form/Unique.fir
+++ b/test/errors/high-form/Unique.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ; CHECK: Reference x does not have a unique name.
 ; CHECK: Reference p does not have a unique name.
diff --git a/test/errors/high-form/WrongReset.fir b/test/errors/high-form/WrongReset.fir
index c936f0b3..adeadee6 100644
--- a/test/errors/high-form/WrongReset.fir
+++ b/test/errors/high-form/WrongReset.fir
@@ -1,4 +1,4 @@
-; RUN: firrtl -i %s -o %s.flo -x X -p c | tee %s.out | FileCheck %s
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
 
 ; CHECK: Module Top has a reset that is not of type UInt<1>.
 ; CHECK: Module B has a reset that is not of type UInt<1>.
-- 
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