From cf80ff9c83c2fedd42ec186a3e342520c89f91ab Mon Sep 17 00:00:00 2001
From: azidar
Date: Tue, 26 May 2015 17:33:40 -0700
Subject: Added <>. Added additional checks for primops. Added new chisel3
 files.

---
 test/errors/high-form/NegVecSize.fir |  7 +++++++
 test/errors/high-form/NegWidth.fir   |  7 +++++++
 test/errors/high-form/NumArgs.fir    | 11 +++++++++++
 test/errors/type/NodeWithFlips.fir   |  8 ++++++++
 test/errors/type/Primop.fir          | 15 +++++++++++++++
 5 files changed, 48 insertions(+)
 create mode 100644 test/errors/high-form/NegVecSize.fir
 create mode 100644 test/errors/high-form/NegWidth.fir
 create mode 100644 test/errors/high-form/NumArgs.fir
 create mode 100644 test/errors/type/NodeWithFlips.fir
 create mode 100644 test/errors/type/Primop.fir

(limited to 'test/errors')

diff --git a/test/errors/high-form/NegVecSize.fir b/test/errors/high-form/NegVecSize.fir
new file mode 100644
index 00000000..16fae565
--- /dev/null
+++ b/test/errors/high-form/NegVecSize.fir
@@ -0,0 +1,7 @@
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; CHECK: Vector type size cannot be negative
+
+circuit Top : 
+  module Top : 
+    wire x : UInt<3>[-5]
+
diff --git a/test/errors/high-form/NegWidth.fir b/test/errors/high-form/NegWidth.fir
new file mode 100644
index 00000000..3f305301
--- /dev/null
+++ b/test/errors/high-form/NegWidth.fir
@@ -0,0 +1,7 @@
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; CHECK: Width cannot be negative.
+
+circuit Top : 
+  module Top : 
+    wire x : UInt<-3>
+
diff --git a/test/errors/high-form/NumArgs.fir b/test/errors/high-form/NumArgs.fir
new file mode 100644
index 00000000..4dc8ad46
--- /dev/null
+++ b/test/errors/high-form/NumArgs.fir
@@ -0,0 +1,11 @@
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; CHECK: Primop mux requires 3 expression arguments.
+; CHECK: Primop add requires 2 expression arguments.
+; CHECK: Primop bits requires 2 integer arguments.
+
+circuit Top : 
+  module Top : 
+    node x = mux(UInt(1),UInt(1))
+    node y = add(SInt(1),UInt(1),UInt(1))
+    node z = bits(UInt(1),1,2,3)
+
diff --git a/test/errors/type/NodeWithFlips.fir b/test/errors/type/NodeWithFlips.fir
new file mode 100644
index 00000000..1342f78d
--- /dev/null
+++ b/test/errors/type/NodeWithFlips.fir
@@ -0,0 +1,8 @@
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; CHECK: Node cannot be a bundle type with flips.
+
+circuit Top : 
+  module Top : 
+    wire x : {x : UInt, flip y : UInt}
+    node z = x
+
diff --git a/test/errors/type/Primop.fir b/test/errors/type/Primop.fir
new file mode 100644
index 00000000..b3a5dbc6
--- /dev/null
+++ b/test/errors/type/Primop.fir
@@ -0,0 +1,15 @@
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+; CHECK: Primop mux requires all operands to have the same type.
+; CHECK: Primop add cannot operate on non-ground types.
+; CHECK: Primop add cannot operate on non-ground types.
+; CHECK: Primop bits requires all arguments to be UInt type.
+; CHECK: Primop mux requires argument SInt(1) to be a UInt type.
+
+circuit Top : 
+  module Top :
+    node x = mux(UInt(1),SInt(1),UInt(1))
+    wire a : { q : UInt<1> }
+    node y = add(a,a)
+    node z = bits(SInt<10>(-1),1,2)
+    node zz = mux(SInt(1),UInt(1),UInt(1))
+
-- 
cgit v1.2.3


From b44b49e6a6589add30b5b1d89d85f2e20432a515 Mon Sep 17 00:00:00 2001
From: azidar
Date: Wed, 27 May 2015 17:15:44 -0700
Subject: Added sequential memories. mem no longer exists, must declare either
 cmem or smem. Added firrtl-gensym utility to generate a hashmap of names

---
 test/errors/high-form/Flip-Mem.fir | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

(limited to 'test/errors')

diff --git a/test/errors/high-form/Flip-Mem.fir b/test/errors/high-form/Flip-Mem.fir
index 662fc6f1..5725aa90 100644
--- a/test/errors/high-form/Flip-Mem.fir
+++ b/test/errors/high-form/Flip-Mem.fir
@@ -1,6 +1,8 @@
 ; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
-; CHECK: Memory m cannot be a bundle type with flips.
+; CHECK: Memory m-c cannot be a bundle type with flips.
+; CHECK: Memory m-s cannot be a bundle type with flips.
 
 circuit Flip-Mem : 
   module Flip-Mem : 
-    mem m : {x : UInt<3>, flip y : UInt<5>}[10]
+    cmem m-c : {x : UInt<3>, flip y : UInt<5>}[10]
+    smem m-s : {x : UInt<3>, flip y : UInt<5>}[10]
-- 
cgit v1.2.3