From eb1ab67b6cc3fd4a549da563bf643bd519d7562e Mon Sep 17 00:00:00 2001
From: azidar
Date: Tue, 25 Aug 2015 14:13:00 -0700
Subject: Added width check pass with tests. #22.

---
 test/errors/width/NegWidth.fir | 9 +++++++++
 1 file changed, 9 insertions(+)
 create mode 100644 test/errors/width/NegWidth.fir

(limited to 'test/errors/width/NegWidth.fir')

diff --git a/test/errors/width/NegWidth.fir b/test/errors/width/NegWidth.fir
new file mode 100644
index 00000000..5d5bbf43
--- /dev/null
+++ b/test/errors/width/NegWidth.fir
@@ -0,0 +1,9 @@
+; RUN: firrtl -i %s -o %s.v -X verilog -p ciwT 2>&1 | tee %s.out | FileCheck %s
+; CHECK: Width cannot be negative or zero.
+
+circuit Top : 
+  module Top : 
+    output y : UInt
+
+    wire x : UInt<2>
+    y := shr(x,4)
-- 
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