From 271e1bf5ed56847c1ce7d50bdb7f1db9ccc5ea55 Mon Sep 17 00:00:00 2001
From: azidar
Date: Mon, 13 Jul 2015 16:22:43 -0700
Subject: Added tests for clocks. Added remove scope and special chars passes.
 Added tests. Made more tests pass

---
 test/errors/high-form/RemoveScope.fir | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 test/errors/high-form/RemoveScope.fir

(limited to 'test/errors/high-form/RemoveScope.fir')

diff --git a/test/errors/high-form/RemoveScope.fir b/test/errors/high-form/RemoveScope.fir
new file mode 100644
index 00000000..1d9f7ef6
--- /dev/null
+++ b/test/errors/high-form/RemoveScope.fir
@@ -0,0 +1,17 @@
+; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s
+; CHECK: Done!
+
+circuit Top :
+  module Top :
+    wire x : UInt<1>
+    node p = UInt(1)
+    when p :
+       wire x : UInt<1>
+       x := UInt(1)
+       node y = add(x,UInt(1))
+    else :
+       wire x : UInt<1>
+       x := UInt(1)
+       node z = add(x,UInt(1))
+    x := UInt(1)
+    node w = add(x,UInt(1))
-- 
cgit v1.2.3