From 0c7aca561aef907314b0d9c9737fcea04ae6ce82 Mon Sep 17 00:00:00 2001
From: Adam Izraelevitz
Date: Tue, 28 Jul 2015 13:29:55 -0700
Subject: Integrated bigint. Mostly works, but getting "cast" error for make
 Test.

---
 test/chisel3/Test.fir | 9 +++++++++
 1 file changed, 9 insertions(+)
 create mode 100644 test/chisel3/Test.fir

(limited to 'test/chisel3')

diff --git a/test/chisel3/Test.fir b/test/chisel3/Test.fir
new file mode 100644
index 00000000..aea7acde
--- /dev/null
+++ b/test/chisel3/Test.fir
@@ -0,0 +1,9 @@
+; RUN: firrtl -i %s -o %s.v -X verilog -p c | tee %s.out | FileCheck %s
+; CHECK: Done!
+
+circuit Test : 
+  module Test : 
+     wire x : UInt<10>
+     x := UInt(5151)
+     x := UInt(515151512512412414124124124124)
+
-- 
cgit v1.2.3


From 6ce20db7e2f81cd3ef8f859614f423bea897484b Mon Sep 17 00:00:00 2001
From: Adam Izraelevitz
Date: Wed, 29 Jul 2015 11:22:02 -0700
Subject: Add bigint support.

---
 test/chisel3/Test.fir | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

(limited to 'test/chisel3')

diff --git a/test/chisel3/Test.fir b/test/chisel3/Test.fir
index aea7acde..1a39b93a 100644
--- a/test/chisel3/Test.fir
+++ b/test/chisel3/Test.fir
@@ -3,7 +3,10 @@
 
 circuit Test : 
   module Test : 
-     wire x : UInt<10>
-     x := UInt(5151)
-     x := UInt(515151512512412414124124124124)
+     wire x : UInt
+     x := UInt(0)
+     x := UInt(1)
+     x := UInt(10)
+     x := UInt(21474836)
+     x := UInt("h21474836")
 
-- 
cgit v1.2.3


From 7646c2e3edf90ea13a83b76c97f35877263c5e63 Mon Sep 17 00:00:00 2001
From: Adam Izraelevitz
Date: Wed, 29 Jul 2015 15:00:37 -0700
Subject: Finished supporting Chisel 2.0 Ref Chip

---
 test/chisel3/Test.fir | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

(limited to 'test/chisel3')

diff --git a/test/chisel3/Test.fir b/test/chisel3/Test.fir
index 1a39b93a..f0d8f80e 100644
--- a/test/chisel3/Test.fir
+++ b/test/chisel3/Test.fir
@@ -3,10 +3,16 @@
 
 circuit Test : 
   module Test : 
-     wire x : UInt
-     x := UInt(0)
-     x := UInt(1)
-     x := UInt(10)
-     x := UInt(21474836)
-     x := UInt("h21474836")
+     input clk : Clock
+     input reset : UInt<1>
+     input falling : UInt<1>
+
+     reg hold : UInt<100>, clk, UInt(1)
+
+     hold := UInt("h42")
+     when reset :
+        hold := UInt("h7f")
+     else :
+        when falling :
+           hold := UInt("h8f")
 
-- 
cgit v1.2.3