From e6beb7b3bbb745a7c7fde616bb349df1bdb7b764 Mon Sep 17 00:00:00 2001
From: jackbackrack
Date: Mon, 13 Apr 2015 18:24:37 -0700
Subject: new chisel3 tests

---
 test/chisel3/Rom.fir | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 test/chisel3/Rom.fir

(limited to 'test/chisel3/Rom.fir')

diff --git a/test/chisel3/Rom.fir b/test/chisel3/Rom.fir
new file mode 100644
index 00000000..bb4960a4
--- /dev/null
+++ b/test/chisel3/Rom.fir
@@ -0,0 +1,24 @@
+circuit Rom : 
+  module Rom : 
+    output out : UInt(8)
+    input addr : UInt(8)
+    
+    node T_24 : UInt(8) = UInt(0, 8)
+    node T_25 : UInt(8) = UInt(1, 8)
+    node T_26 : UInt(8) = UInt(2, 8)
+    node T_27 : UInt(8) = UInt(3, 8)
+    node T_28 : UInt(8) = UInt(4, 8)
+    node T_29 : UInt(8) = UInt(5, 8)
+    node T_30 : UInt(8) = UInt(6, 8)
+    node T_31 : UInt(8) = UInt(7, 8)
+    wire r : UInt(8)[8]
+    r.0 := T_24
+    r.1 := T_25
+    r.2 := T_26
+    r.3 := T_27
+    r.4 := T_28
+    r.5 := T_29
+    r.6 := T_30
+    r.7 := T_31
+    accessor T_32 = r[addr]
+    out := T_32
\ No newline at end of file
-- 
cgit v1.2.3