From cf80ff9c83c2fedd42ec186a3e342520c89f91ab Mon Sep 17 00:00:00 2001
From: azidar
Date: Tue, 26 May 2015 17:33:40 -0700
Subject: Added <>. Added additional checks for primops. Added new chisel3
 files.

---
 test/chisel3/ModuleWire.fir | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 test/chisel3/ModuleWire.fir

(limited to 'test/chisel3/ModuleWire.fir')

diff --git a/test/chisel3/ModuleWire.fir b/test/chisel3/ModuleWire.fir
new file mode 100644
index 00000000..fefe42bd
--- /dev/null
+++ b/test/chisel3/ModuleWire.fir
@@ -0,0 +1,17 @@
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+;CHECK: Done!
+
+circuit ModuleWire : 
+  module Inc : 
+    input in : UInt<32>
+    output out : UInt<32>
+    
+    node T_12 = add-wrap(in, UInt<1>(1))
+    out := T_12
+  module ModuleWire : 
+    input in : UInt<32>
+    output out : UInt<32>
+    
+    inst T_13 of Inc
+    T_13.in := in
+    out := T_13.out
-- 
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