From cf80ff9c83c2fedd42ec186a3e342520c89f91ab Mon Sep 17 00:00:00 2001
From: azidar
Date: Tue, 26 May 2015 17:33:40 -0700
Subject: Added <>. Added additional checks for primops. Added new chisel3
 files.

---
 test/chisel3/BundleWire.fir | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 test/chisel3/BundleWire.fir

(limited to 'test/chisel3/BundleWire.fir')

diff --git a/test/chisel3/BundleWire.fir b/test/chisel3/BundleWire.fir
new file mode 100644
index 00000000..2c2ad772
--- /dev/null
+++ b/test/chisel3/BundleWire.fir
@@ -0,0 +1,17 @@
+; RUN: firrtl -i %s -o %s.flo -X flo -p c | tee %s.out | FileCheck %s
+;CHECK: Done!
+
+circuit BundleWire : 
+  module BundleWire : 
+    input in : {x : UInt<32>, y : UInt<32>}
+    output outs : {x : UInt<32>, y : UInt<32>}[4]
+    
+    wire coords : {x : UInt<32>, y : UInt<32>}[4]
+    coords[0] := in
+    outs[0] := coords[0]
+    coords[1] := in
+    outs[1] := coords[1]
+    coords[2] := in
+    outs[2] := coords[2]
+    coords[3] := in
+    outs[3] := coords[3]
-- 
cgit v1.2.3