From c1ca57452af8adc00bef92e2ddf8984c8cde5620 Mon Sep 17 00:00:00 2001
From: Colin Schmidt
Date: Mon, 5 Sep 2016 14:47:42 -0700
Subject: Change null statement to empty begin end (#264)

this eliminates warnings in recent versions of VCS---
 src/main/scala/firrtl/Emitter.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/main/scala/firrtl/Emitter.scala b/src/main/scala/firrtl/Emitter.scala
index 46e1716c..a4f5c14d 100644
--- a/src/main/scala/firrtl/Emitter.scala
+++ b/src/main/scala/firrtl/Emitter.scala
@@ -657,7 +657,7 @@ class VerilogEmitter extends Emitter {
             //  then start the simulation later
             // Verilator does not support delay statements, so they are omitted.
             emit(Seq("    `ifndef verilator"))
-            emit(Seq("      #0.002;"))
+            emit(Seq("      #0.002 begin end"))
             emit(Seq("    `endif"))
             for (x <- initials) {
                emit(Seq(tab,x))
-- 
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