From aca23a617999287183effea0272a4c95b27ff4b2 Mon Sep 17 00:00:00 2001
From: Donggyu
Date: Mon, 24 Oct 2016 14:33:49 -0700
Subject: match fromBits order with toBits, toBitMask (#349)

---
 src/main/scala/firrtl/passes/memlib/MemUtils.scala | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/main/scala/firrtl/passes/memlib/MemUtils.scala b/src/main/scala/firrtl/passes/memlib/MemUtils.scala
index 22650c7a..ffe3bbcd 100644
--- a/src/main/scala/firrtl/passes/memlib/MemUtils.scala
+++ b/src/main/scala/firrtl/passes/memlib/MemUtils.scala
@@ -110,8 +110,8 @@ object fromBits {
                       rhs: Expression,
                       offset: BigInt): (BigInt, Seq[Statement]) =
     lhst match {
-      case t: VectorType => (0 until t.size foldRight (offset, Seq[Statement]())) {
-        case (i, (curOffset, stmts)) =>
+      case t: VectorType => (0 until t.size foldLeft (offset, Seq[Statement]())) {
+        case ((curOffset, stmts), i) =>
           val subidx = WSubIndex(lhs, i, t.tpe, UNKNOWNGENDER)
           val (tmpOffset, substmts) = getPart(subidx, t.tpe, rhs, curOffset)
           (tmpOffset, stmts ++ substmts)
-- 
cgit v1.2.3