From 93869ccec89aa9739b6fe9f0e3bd62ae8cf155cd Mon Sep 17 00:00:00 2001
From: Megan Wachs
Date: Fri, 11 Dec 2020 12:09:03 -0800
Subject: fix scaladoc for ReferenceTarget (#2014)

---
 src/main/scala/firrtl/annotations/Target.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/main/scala/firrtl/annotations/Target.scala b/src/main/scala/firrtl/annotations/Target.scala
index 137d070e..8e84a269 100644
--- a/src/main/scala/firrtl/annotations/Target.scala
+++ b/src/main/scala/firrtl/annotations/Target.scala
@@ -612,7 +612,7 @@ case class ModuleTarget(circuit: String, module: String) extends IsModule {
 }
 
 /** Target pointing to a declared named component in a [[firrtl.ir.DefModule]]
-  * This includes: [[firrtl.ir.Port]], [[firrtl.ir.DefWire]], [[firrtl.ir.DefRegister]], [[firrtl.ir.DefInstance]],
+  * This includes: [[firrtl.ir.Port]], [[firrtl.ir.DefWire]], [[firrtl.ir.DefRegister]],
   *   [[firrtl.ir.DefMemory]], [[firrtl.ir.DefNode]]
   * @param circuit Name of the encapsulating circuit
   * @param module Name of the root module of this reference
-- 
cgit v1.2.3