From 5e6fac5d51bf62078d2319a0aae05807f82cf809 Mon Sep 17 00:00:00 2001
From: Andrew Waterman
Date: Wed, 6 Jul 2016 03:26:11 -0700
Subject: Rely on $fatal vs. $finish, rather than stderr, for stop codes

This approach uses the normal Unix mechanisms, rather than log grepping.
---
 src/main/scala/firrtl/Emitter.scala | 1 -
 1 file changed, 1 deletion(-)

(limited to 'src')

diff --git a/src/main/scala/firrtl/Emitter.scala b/src/main/scala/firrtl/Emitter.scala
index 804c899a..c6bf2121 100644
--- a/src/main/scala/firrtl/Emitter.scala
+++ b/src/main/scala/firrtl/Emitter.scala
@@ -477,7 +477,6 @@ class VerilogEmitter extends Emitter {
             }
             case (s:Stop) => {
               val errorString = StringLit(s"${s.ret}\n".getBytes)
-              build_streams(Print(NoInfo, errorString, Seq(), s.clk, s.en))
               simulate(s.clk, s.en, stop(s.ret), Some("STOP_COND"))
             }
             case (s:Print) => simulate(s.clk, s.en, printf(s.string, s.args), Some("PRINTF_COND"))
-- 
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