From 70322b7a1106225cf3638845fda0512d30610c25 Mon Sep 17 00:00:00 2001 From: azidar Date: Fri, 24 Apr 2015 18:02:22 -0700 Subject: NEG now propogates input args plus one --- src/main/stanza/primop.stanza | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/main/stanza/primop.stanza b/src/main/stanza/primop.stanza index e88a6b8e..7d341aa2 100644 --- a/src/main/stanza/primop.stanza +++ b/src/main/stanza/primop.stanza @@ -327,8 +327,8 @@ public defn primop-gen-constraints (e:DoPrim,v:Vector) -> Type : NEQUAL-SS-OP : IntWidth(1) PAD-U-OP : IntWidth(consts(e)[0]) PAD-S-OP : IntWidth(consts(e)[0]) - NEG-U-OP : IntWidth(1) - NEG-S-OP : IntWidth(1) + NEG-U-OP : PlusWidth(max-args-w,IntWidth(1)) + NEG-S-OP : PlusWidth(max-args-w,IntWidth(1)) SHIFT-LEFT-U-OP : PlusWidth(max-args-w,IntWidth(consts(e)[0])) SHIFT-LEFT-S-OP : PlusWidth(max-args-w,IntWidth(consts(e)[0])) SHIFT-RIGHT-U-OP : MinusWidth(max-args-w,IntWidth(consts(e)[0])) -- cgit v1.2.3 From 48cb328f0bbae65800c733f4647d699db968b696 Mon Sep 17 00:00:00 2001 From: azidar Date: Fri, 24 Apr 2015 18:08:53 -0700 Subject: Fixed switch statement --- src/main/stanza/primop.stanza | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/main/stanza/primop.stanza b/src/main/stanza/primop.stanza index 7d341aa2..455da396 100644 --- a/src/main/stanza/primop.stanza +++ b/src/main/stanza/primop.stanza @@ -272,7 +272,7 @@ public defn primop-gen-constraints (e:DoPrim,v:Vector) -> Type : ; new-width(PlusWidth(width!(l[0]),width!(l[1]))) println-all-debug(["Looking at " op(e) " with inputs " args(e)]) - val all-args-not-equal = list(MUX-UU-OP,MUX-SS-OP,CONCAT-OP) + val all-args-not-equal = to-list([MUX-UU-OP,MUX-SS-OP,CONCAT-OP,BIT-AND-OP,BIT-NOT-OP,BIT-OR-OP,BIT-XOR-OP,BIT-AND-REDUCE-OP,BIT-OR-REDUCE-OP,BIT-XOR-REDUCE-OP,AS-UINT-U-OP,AS-UINT-S-OP,AS-SINT-U-OP,AS-SINT-S-OP]) ;val consts-gte-args = list(PAD-U-OP,PAD-S-OP) -- cgit v1.2.3