From 41d0d6960891e1823a7db37b5f93863bff4eb24d Mon Sep 17 00:00:00 2001
From: Albert Magyar
Date: Mon, 18 May 2020 12:16:04 -0700
Subject: Don't try deduping the main module of a circuit (#1594)

---
 src/main/scala/firrtl/transforms/Dedup.scala           | 3 ++-
 src/test/scala/firrtlTests/transforms/DedupTests.scala | 4 ++++
 2 files changed, 6 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/main/scala/firrtl/transforms/Dedup.scala b/src/main/scala/firrtl/transforms/Dedup.scala
index d0df9e32..c3149e55 100644
--- a/src/main/scala/firrtl/transforms/Dedup.scala
+++ b/src/main/scala/firrtl/transforms/Dedup.scala
@@ -53,7 +53,8 @@ class DedupModules extends Transform with DependencyAPIMigration with PreservesA
     if (state.annotations.contains(NoCircuitDedupAnnotation)) {
       state
     } else {
-      val noDedups = state.annotations.collect { case NoDedupAnnotation(ModuleName(m, c)) => m }
+      // Don't try deduping the main module of the circuit
+      val noDedups = state.circuit.main +: state.annotations.collect { case NoDedupAnnotation(ModuleName(m, c)) => m }
       val (newC, renameMap) = run(state.circuit, noDedups, state.annotations)
       state.copy(circuit = newC, renames = Some(renameMap))
     }
diff --git a/src/test/scala/firrtlTests/transforms/DedupTests.scala b/src/test/scala/firrtlTests/transforms/DedupTests.scala
index c96517ad..4cc19c9d 100644
--- a/src/test/scala/firrtlTests/transforms/DedupTests.scala
+++ b/src/test/scala/firrtlTests/transforms/DedupTests.scala
@@ -547,6 +547,10 @@ class DedupModuleTests extends HighTransformSpec {
       """.stripMargin
     val check =
       """circuit main:
+        |  module dupe:
+        |    input in: UInt<8>
+        |    output out: UInt<8>
+        |    out <= in
         |  module main:
         |    input in:  UInt<8>
         |    output out: UInt<8>
-- 
cgit v1.2.3