From 0c49cfecfcf7831ee3df20b986585942b5cc9812 Mon Sep 17 00:00:00 2001
From: Adam Izraelevitz
Date: Tue, 21 Mar 2017 15:13:35 -0700
Subject: Fixed zero width perf bug #502

Now remove DefNodes of zero width
Don't deeply walk nodes (was the source of the bug)
---
 src/main/scala/firrtl/passes/ZeroWidth.scala    | 8 ++++++--
 src/test/scala/firrtlTests/ZeroWidthTests.scala | 4 ++--
 2 files changed, 8 insertions(+), 4 deletions(-)

(limited to 'src')

diff --git a/src/main/scala/firrtl/passes/ZeroWidth.scala b/src/main/scala/firrtl/passes/ZeroWidth.scala
index 8638ea68..a50fdc16 100644
--- a/src/main/scala/firrtl/passes/ZeroWidth.scala
+++ b/src/main/scala/firrtl/passes/ZeroWidth.scala
@@ -36,18 +36,22 @@ object ZeroWidth extends Pass {
       (e map replaceType) map onExp
   }
   private def onStmt(s: Statement): Statement = s match {
-    case sx: IsDeclaration =>
+    case (_: DefWire| _: DefRegister| _: DefMemory) =>
       var removed = false
       def applyRemoveZero(t: Type): Type = removeZero(t) match {
         case None => removed = true; t
         case Some(tx) => tx
       }
-      val sxx = (sx map onExp) map applyRemoveZero
+      val sxx = (s map onExp) map applyRemoveZero
       if(removed) EmptyStmt else sxx
     case Connect(info, loc, exp) => removeZero(loc.tpe) match {
       case None => EmptyStmt
       case Some(t) => Connect(info, loc, onExp(exp))
     }
+    case DefNode(info, name, value) => removeZero(value.tpe) match {
+      case None => EmptyStmt
+      case Some(t) => s
+    }
     case sx => sx map onStmt
   }
   private def onModule(m: DefModule): DefModule = {
diff --git a/src/test/scala/firrtlTests/ZeroWidthTests.scala b/src/test/scala/firrtlTests/ZeroWidthTests.scala
index 53fae73f..5cb7e532 100644
--- a/src/test/scala/firrtlTests/ZeroWidthTests.scala
+++ b/src/test/scala/firrtlTests/ZeroWidthTests.scala
@@ -93,7 +93,7 @@ class ZeroWidthTests extends FirrtlFlatSpec {
         |    skip""".stripMargin
       (parse(exec(input)).serialize) should be (parse(check).serialize)
   }
-  "Node with <0>" should "be given zero" in {
+  "Node with <0>" should "be removed" in {
     val input =
       """circuit Top :
         |  module Top :
@@ -102,7 +102,7 @@ class ZeroWidthTests extends FirrtlFlatSpec {
     val check =
       """circuit Top :
         |  module Top :
-        |    node x = UInt(0)""".stripMargin
+        |    skip""".stripMargin
       (parse(exec(input)).serialize) should be (parse(check).serialize)
   }
 }
-- 
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