From 0608bfbe363780132c0baf1e7098013ab4352f34 Mon Sep 17 00:00:00 2001 From: azidar Date: Wed, 29 Apr 2015 19:23:03 -0700 Subject: Fixed bug where a node's width was not equal to its value's --- src/main/stanza/passes.stanza | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza index 39795a62..5d2abb81 100644 --- a/src/main/stanza/passes.stanza +++ b/src/main/stanza/passes.stanza @@ -1520,7 +1520,12 @@ defn gen-constraints (m:Module, h:HashTable, v:Vector) -> Mod (s:DefWire) : DefWire(name(s),h[name(s)]) (s:DefInstance) : DefInstance(name(s),gen-constraints(module(s))) (s:DefMemory) : DefMemory(name(s),h[name(s)] as VectorType) - (s:DefNode) : DefNode(name(s),gen-constraints(value(s))) + (s:DefNode) : + val l = h[name(s)] + val r = gen-constraints(value(s)) + add(v,WGeq(width!(l),width!(type(r)))) + add(v,WGeq(width!(type(r)),width!(l))) + DefNode(name(s),r) (s:Connect) : val l = gen-constraints(loc(s)) val e = gen-constraints(exp(s)) -- cgit v1.2.3