From 860e6844708e4b87ced04bcef0eda7810cba106a Mon Sep 17 00:00:00 2001 From: albertchen-sifive Date: Thu, 13 Sep 2018 22:09:18 -0700 Subject: Do not remove ExtMods with no ports by default (#888) --- src/test/scala/firrtlTests/DCETests.scala | 35 +++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'src/test') diff --git a/src/test/scala/firrtlTests/DCETests.scala b/src/test/scala/firrtlTests/DCETests.scala index b8345093..a6def402 100644 --- a/src/test/scala/firrtlTests/DCETests.scala +++ b/src/test/scala/firrtlTests/DCETests.scala @@ -8,6 +8,7 @@ import firrtl.passes._ import firrtl.transforms._ import firrtl.annotations._ import firrtl.passes.memlib.SimpleTransform +import FirrtlCheckers._ import java.io.File import java.nio.file.Paths @@ -320,6 +321,40 @@ class DCETests extends FirrtlFlatSpec { """.stripMargin exec(input, input) } + "extmodules with no ports" should "NOT be deleted by default" in { + val input = + """circuit Top : + | extmodule BlackBox : + | defname = BlackBox + | module Top : + | input x : UInt<1> + | output y : UInt<1> + | inst blackBox of BlackBox + | y <= x + |""".stripMargin + exec(input, input) + } + "extmodules with no ports marked optimizable" should "be deleted" in { + val input = + """circuit Top : + | extmodule BlackBox : + | defname = BlackBox + | module Top : + | input x : UInt<1> + | output y : UInt<1> + | inst blackBox of BlackBox + | y <= x + |""".stripMargin + val check = + """circuit Top : + | module Top : + | input x : UInt<1> + | output y : UInt<1> + | y <= x + |""".stripMargin + val doTouchAnno = OptimizableExtModuleAnnotation(ModuleName("BlackBox", CircuitName("Top"))) + exec(input, check, Seq(doTouchAnno)) + } // bar.z is not used and thus is dead code, but foo.z is used so this code isn't eliminated "Module deduplication" should "should be preserved despite unused output of ONE instance" in { val input = -- cgit v1.2.3