From 41d0d6960891e1823a7db37b5f93863bff4eb24d Mon Sep 17 00:00:00 2001
From: Albert Magyar
Date: Mon, 18 May 2020 12:16:04 -0700
Subject: Don't try deduping the main module of a circuit (#1594)

---
 src/test/scala/firrtlTests/transforms/DedupTests.scala | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/test')

diff --git a/src/test/scala/firrtlTests/transforms/DedupTests.scala b/src/test/scala/firrtlTests/transforms/DedupTests.scala
index c96517ad..4cc19c9d 100644
--- a/src/test/scala/firrtlTests/transforms/DedupTests.scala
+++ b/src/test/scala/firrtlTests/transforms/DedupTests.scala
@@ -547,6 +547,10 @@ class DedupModuleTests extends HighTransformSpec {
       """.stripMargin
     val check =
       """circuit main:
+        |  module dupe:
+        |    input in: UInt<8>
+        |    output out: UInt<8>
+        |    out <= in
         |  module main:
         |    input in:  UInt<8>
         |    output out: UInt<8>
-- 
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