From d7bf6fb7b415d35f967d247119b8975c3dc885a3 Mon Sep 17 00:00:00 2001
From: Donggyu Kim
Date: Tue, 30 Aug 2016 18:51:17 -0700
Subject: refactor checks

---
 src/test/scala/firrtlTests/CheckInitializationSpec.scala | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/test')

diff --git a/src/test/scala/firrtlTests/CheckInitializationSpec.scala b/src/test/scala/firrtlTests/CheckInitializationSpec.scala
index 515bbfc8..e2eaf690 100644
--- a/src/test/scala/firrtlTests/CheckInitializationSpec.scala
+++ b/src/test/scala/firrtlTests/CheckInitializationSpec.scala
@@ -60,7 +60,7 @@ class CheckInitializationSpec extends FirrtlFlatSpec {
         |    wire x : UInt<32>
         |    when p :
         |      x <= UInt(1)""".stripMargin
-    intercept[PassExceptions] {
+    intercept[CheckInitialization.RefNotInitializedException] {
       passes.foldLeft(parse(input)) {
         (c: Circuit, p: Pass) => p.run(c)
       }
@@ -75,7 +75,7 @@ class CheckInitializationSpec extends FirrtlFlatSpec {
         |    when p :
         |    else :
         |      x <= UInt(1)""".stripMargin
-    intercept[PassExceptions] {
+    intercept[CheckInitialization.RefNotInitializedException] {
       passes.foldLeft(parse(input)) {
         (c: Circuit, p: Pass) => p.run(c)
       }
-- 
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