From de20d4d7d0bb98430871d37e0a7c7c6612b44e0f Mon Sep 17 00:00:00 2001
From: John Wright
Date: Tue, 19 Mar 2019 11:08:07 -0700
Subject: Designs with no SeqMems should produce empty MemConf strings, and
 this should be parsable without excepting (#1060)

---
 src/test/scala/firrtlTests/ReplSeqMemTests.scala | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

(limited to 'src/test/scala/firrtlTests')

diff --git a/src/test/scala/firrtlTests/ReplSeqMemTests.scala b/src/test/scala/firrtlTests/ReplSeqMemTests.scala
index b51e2271..a1f27958 100644
--- a/src/test/scala/firrtlTests/ReplSeqMemTests.scala
+++ b/src/test/scala/firrtlTests/ReplSeqMemTests.scala
@@ -487,6 +487,28 @@ circuit CustomMemory :
     checkMemConf(confLoc, mems)
     (new java.io.File(confLoc)).delete()
   }
+
+  "ReplSeqMem" should "produce an empty conf file with no SeqMems" in {
+    val input = """
+circuit NoMemsHere :
+  module NoMemsHere :
+    input clock : Clock
+    input in : UInt<8>
+    output out : UInt<8>
+
+    out is invalid
+
+    out <= in
+"""
+    val mems = Set.empty[MemConf]
+    val confLoc = "ReplSeqMemTests.confTEMP"
+    val annos = Seq(ReplSeqMemAnnotation.parse("-c:CustomMemory:-o:"+confLoc),
+                    InferReadWriteAnnotation)
+    val res = compileAndEmit(CircuitState(parse(input), ChirrtlForm, annos))
+    // Check the emitted conf
+    checkMemConf(confLoc, mems)
+    (new java.io.File(confLoc)).delete()
+  }
 }
 
 // TODO: make more checks
-- 
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