From 2272044c6ab46b5148c39c124e66e1a8e9073a24 Mon Sep 17 00:00:00 2001 From: Jack Koenig Date: Thu, 14 Feb 2019 15:08:35 -0800 Subject: Asynchronous Reset (#1011) Fixes #219 * Adds AsyncResetType (similar to ClockType) * Registers with reset signal of type AsyncResetType are async reset registers * Registers with async reset can only be reset to literal values * Add initialization logic for async reset registers--- src/test/scala/firrtlTests/FirrtlSpec.scala | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'src/test/scala/firrtlTests/FirrtlSpec.scala') diff --git a/src/test/scala/firrtlTests/FirrtlSpec.scala b/src/test/scala/firrtlTests/FirrtlSpec.scala index 88238785..b3729f96 100644 --- a/src/test/scala/firrtlTests/FirrtlSpec.scala +++ b/src/test/scala/firrtlTests/FirrtlSpec.scala @@ -216,15 +216,18 @@ object FirrtlCheckers extends FirrtlMatchers { } /** Checks that the emitted circuit has the expected line, both will be normalized */ - def containLine(expectedLine: String) = new CircuitStateStringMatcher(expectedLine) + def containLine(expectedLine: String) = containLines(expectedLine) - class CircuitStateStringMatcher(expectedLine: String) extends Matcher[CircuitState] { + /** Checks that the emitted circuit has the expected lines in order, all lines will be normalized */ + def containLines(expectedLines: String*) = new CircuitStateStringsMatcher(expectedLines) + + class CircuitStateStringsMatcher(expectedLines: Seq[String]) extends Matcher[CircuitState] { override def apply(state: CircuitState): MatchResult = { val emitted = state.getEmittedCircuit.value MatchResult( - emitted.split("\n").map(normalized).contains(normalized(expectedLine)), - emitted + "\n did not contain \"" + expectedLine + "\"", - s"${state.circuit.main} contained $expectedLine" + emitted.split("\n").map(normalized).containsSlice(expectedLines.map(normalized)), + emitted + "\n did not contain \"" + expectedLines + "\"", + s"${state.circuit.main} contained $expectedLines" ) } } -- cgit v1.2.3