From e39609a2bfbbd108fa1e5044e9c270685d75a816 Mon Sep 17 00:00:00 2001 From: Jack Koenig Date: Thu, 9 Nov 2017 19:02:43 -0800 Subject: Add RemoveWires transform This transform replaces all wires with nodes in a legal, flow-forward order --- src/test/scala/firrtlTests/ConstantPropagationTests.scala | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'src/test/scala/firrtlTests/ConstantPropagationTests.scala') diff --git a/src/test/scala/firrtlTests/ConstantPropagationTests.scala b/src/test/scala/firrtlTests/ConstantPropagationTests.scala index e7bf7884..06e24b97 100644 --- a/src/test/scala/firrtlTests/ConstantPropagationTests.scala +++ b/src/test/scala/firrtlTests/ConstantPropagationTests.scala @@ -721,7 +721,13 @@ class ConstantPropagationIntegrationSpec extends LowTransformSpec { | wire z : UInt<1> | y <= z | z <= x""".stripMargin - val check = input + val check = + """circuit Top : + | module Top : + | input x : UInt<1> + | output y : UInt<1> + | node z = x + | y <= z""".stripMargin execute(input, check, Seq(dontTouch("Top.z"))) } -- cgit v1.2.3